ISL78200 Datasheet, PDF (17/19 Pages) Intersil Corporation – 2.5A Regulator with Integrated High-Side MOSFET for Synchronous Buck or Boost Buck Converter

ISL78200
Input Capacitors
Depending upon the system input power rail conditions, the
aluminum electrolytic type capacitor is normally needed to
provide the stable input voltage and restrict the switching
frequency pulse current in small areas over the input traces for
better EMC performance. The input capacitor should be able to
handle the RMS current from the switching power devices.
Ceramic capacitors must be used at the VIN pin of the IC and
multiple capacitors including 1µF and 0.1µF are recommended.
Place these capacitors as closely as possible to the IC.
Output Inductor
Generally the inductor should filter the current ripple to 30~40%
of the regulator’s maximum average output current. The low DCR
inductor should be selected for the highest efficiency. Also, the
inductor saturation current rating should be higher than the
highest transient expected.
Low Side Power MOSFET
In synchronous buck application, a power N MOSFET is needed
as the synchronous low side MOSFET and it must have low
r_DS(ON), lowest Rg (Rg_typ < 1.5Ω recommended), Vgth
(Vgth_min ≥ 1.2V) and Qgd. A good example is BSZ100N06LS3G.
Output Voltage Feedback Resistor Divider
The output voltage can be programmed down to 0.8V by a
resistor divider from V_OUT to FB according to Equation 11.
V_OUT
=
0.8
⋅
⎛
⎜1
⎝
+
R^---R--_L^--U-_O^---PW--- _{⎠⎟⎞}
(EQ. 11)
In applications requiring the least input quiescent current, large
resistors should be used for the divider to keep its leakage
current low. 232k is a recommended for the upper resistor.
Compensation Network
With peak current mode control, type II compensation is
normally used for most of applications. However, in applications
seeking to achieve higher bandwidth, type III compensation is
good to use.
Note in applications where the PFM mode is desired, and type III
compensation network is used, the value of the capacitor
between the COMP pin and the FB pin (not the capacitor in series
with the resistor between COMP and FB) should be minimal to
reduce the noise coupling for proper PFM operation. 10pF is
recommended for this capacitor between COMP and FB at PFM
applications. A capacitor (<1nF) at the FB pin to ground also
helps proper PFM mode operation.
Boost Inductor
Besides the need to sustain the current ripple to be within a
certain range (30% to 50%), the boost inductor current at its
soft-start is a more important perspective to be considered in
selection of the boost inductor. Each time the boost starts up,
there is a fixed 500µs soft-start time when the duty cycle
increase linearly from t_MINON to ~50%. Before and after boost
start-up, the boost output voltage will jump from V_IN_boost to
voltage (V_IN_boost+V_OUT_buck). The design target in boost
soft-start is to ensure the boost input current is sustained to a
minimum but capable of charging the boost output voltage to
have a voltage step equaling to V_OUT_buck. A big inductor will
block the inductor current increase and not high enough to be
able to charge the output capacitor to the final steady state value
(V_IN_boost+V_OUT_buck) within 500µs. A 6.8µH inductor is a good
starting point for its selection in design. The boost inductor
current at start-up must be checked by an oscilloscope to ensure
it is under the acceptable range.
Boost Output Capacitor
Based on the same theory in boost start-up described above in
boost inductor selection, a large capacitor at boost output will
cause high inrush current at boost PWM start-up. 22µF is a good
choice for applications with buck output voltage less than 10V.
Also, some minimum amount of capacitance has to be used in
boost output to keep the system stable.
Layout Suggestions
1. Put the input ceramic capacitors as close to the IC VIN pin and
power ground connecting to the power MOSFET or diode.
Keep this loop (input ceramic capacitor, IC V_IN pin and
MOSFET/diode) as tiny as possible to achieve the least
voltage spikes induced by the trace parasitic inductance.
2. Put the input aluminum capacitors close to IC VIN pin.
3. Keep the phase node copper area small but large enough to
handle the load current.
4. Put the output ceramic and aluminum capacitors also close
to the power stage components.
5. Put vias (≥15) in the bottom pad of the IC. The bottom pad
should be placed in the ground copper plane with an area as
large as possible in multiple layers to effectively reduce the
thermal impedance.
6. Place the 4.7µF ceramic decoupling capacitor at the VCC pin
and as close as possible to the IC. Put multiple vias (≥3) close
to the ground pad of this capacitor.
7. Keep the bootstrap capacitor close to the IC.
8. Keep the LGATE drive trace as short as possible and try to
avoid using a via in the LGATE drive path to achieve the lowest
impedance.
9. Place the positive voltage sense trace close to the load for
tighter regulation.
10. Place all the peripheral control components close to the IC.
FIGURE 31. PCB VIA PATTERN
17
FN7641.0
September 22, 2011