ISL6140_14 Datasheet, PDF (17/19 Pages) Intersil Corporation – Negative Voltage Hot Plug Controller

ISL6140, ISL6150
GND
GND
(SHORT PIN)
R₁₁
R₄
R₁₀*
R₈*
G
SW1
NFET*
(INSTEAD
OF SW1)
C4*
D₁*
R₅
R₁₂
V_DD
UV
OV _VEE
ISL6140 (L)
SENSE
GATE
PWRGD
DRAIN
R₆*
C3*
D₂*
D₃*
R₃
R₇*
C₁
R₂
C₂
GND
CL*
-V_IN
R₁
Q₁
-V_OUT
FIGURE 29. ISL6140/50 OPTIONAL COMPONENTS (SHOWN WITH *)
Optional Components
D₁ is a voltage suppressor; SMAT70A or equivalent.
D₂ and D₃ are DRAIN diodes; the ISL6150 (H version)
uses both D₂ and D₃; the ISL6140 (L version) uses
just D₂. If neither is used, short the path of either, to
connect the DRAIN pin to C₂ and Q₁. The 1N4148 is a
typical diode.
SW1 is a push-button switch, that can manually reset
the fault latch after an overcurrent shutdown. It can
also be replaced by a transistor switch.
R₁₀ and C₄ are used to filter the V_DD voltage, such
that small transients on the input supply do not trigger
UV or OV.
R₇ and C₃ are used to delay the overcurrent shutdown.
R₇ should be shorted, if not used. See the overcurrent
section for more details.
R₈ is a pull-up resistor for PWRGD, if there is no other
component acting as a pull-up device. An LED can also
be placed in series with R₈, if desired (see Figure 8).
C_L is any extra output Load capacitance, which can
also be considered input capacitance for the external
module.
R₆ is used to add more hysteresis to the UV threshold,
which already has a built-in 20mV hysteresis. With R₆,
the new thresholds with a rising and falling input are
shown in Equation 3 and 4:
Vuv(RISING) = VUVH • _⎝⎛-^R----⁵-----^•----^R-----⁶-----+-----_RR-----₅₄-----_••----_RR-----₆₆----+-----^R-----⁴-----^•----^R-----⁵--_{⎠⎞ (EQ. 3)}
Vu
v(fa
l
l
i
n
g)
=
VUVL
•
⎛
⎝
-^R----⁵-----^•----^R-----⁶-----+-----^RR-----⁴⁵-----_••----^RR-----⁶⁶-----+----^R-----⁴-----^•----^R-----⁵--_⎠⎞
–
V
ga
t
e
•
⎛
⎝
RR_-----46_{--⎠⎞}
(EQ. 4)
Since R₆ is connected directly to the GATE output, it
will reduce the available gate current, which will reduce
the dv/dt across the MOSFET and hence the inrush
current. The value of R₆ should be kept as high as
possible (greater than 500k recommended) so that it
does not drag down the GATE voltage below the value
required to ensure the MOSFET is fully enhanced.
Figure 30 shows a sample component placement and
routing for the typical application shown in Figure 31.
17
FN9039.4