ISL59451 Datasheet, PDF (16/17 Pages) Intersil Corporation – Triple 4:1 DC Restored Single Supply Video Multiplexing Amplifier

ISL59451
CLAMP enables and disables the DC restore circuitry. For
control signal rise and fall times less than 10ns, the use of
termination resistors on the control lines close to the part may
be necessary to prevent reflections and to minimize transients
coupled to the output. See Table 1 for the S1, S0 selection
states.
High-Impedance State
An internal pull-down resistor ensures the device will be
active with no connection to the HIZ pin. The HIZ state is
established within approximately 25ns by placing a logic
high (>2V) on the HIZ pin. If the HIZ state is selected, the
output impedance is ~2000Ω (Figure 6). The supply current
during this state is reduced to ~3mA.
Limiting the Output Current
No output short circuit current limit exists on these parts. All
applications need to limit the output current to less than
50mA. Adequate thermal heat sinking of the parts is also
required.
PC Board Layout
The AC performance of this circuit depends greatly on the
care taken in designing the PC board. The following are
recommendations to achieve optimum high frequency
performance from your PC board.
• Use low inductance components, such as chip resistors
and chip capacitors whenever possible.
• Minimize signal trace lengths. Trace inductance and
capacitance can easily limit circuit performance. Avoid
sharp corners; use rounded corners when possible. Vias
in the signal lines add inductance at high frequency and
should be avoided. PCB traces longer than 1" begin to
exhibit transmission line characteristics with signal rise/fall
times of 1ns or less. To maintain frequency performance
with longer traces, use striplines.
• Match channel-to-channel analog I/O trace lengths and
layout symmetry. This will minimize propagation delay
mismatches.
• All signal I/O lines should be routed over continuous
ground planes (i.e. no split planes or PCB gaps under
these lines).
• Put the proper termination resistors in their optimum
location as close to the device as possible.
• When testing, use good quality connectors and cables,
matching cable types and keeping cable lengths to a
minimum.
• Decouple well, using aminimum of 2 power supply
decoupling capacitors (1000pF, 0.01µF), placed as close
to the devices as possible. Avoid vias between the
capacitor and the device because vias adds unwanted
inductance. Larger caps can be farther away. When vias
are required in a layout, they should be routed as far away
from the device as possible.
The QFN Package Requires Additional PCB Layout
Rules for the Thermal Pad
The thermal pad is electrically connected to GND through
the high resistance IC substrate. Its primary function is to
provide heat sinking for the IC.
Maximum AC performance is achieved if the thermal pad is
attached to a dedicated decoupled layer in a multi-layered
PC board. In cases where a dedicated layer is not possible,
AC performance may be reduced at upper frequencies.
• The thermal pad requirements are proportional to power
dissipation and ambient temperature. A dedicated layer
(oftern the ground plane) eliminates the need for individual
thermal pad area. When a dedicated layer is not possible,
a 1”x1” pad area is sufficient for an ISL59451 dissipating
0.5W at +50°C ambient. Pad area requirements should be
evaluated according to the maximum ambient
temperature, the maximum supply current (including worst
case signals + loads), and the thermal characteristic of the
PCB.
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FN6253.0
September 24, 2007