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X9271_11 Datasheet, PDF (15/22 Pages) Intersil Corporation – Single, Digitally Controlled (XDCP™) Potentiometer
X9271
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
Symbol
ICC1
ICC2
ISB
Parameter
VCC Supply Current
(Active)
VCC Supply Current
(Nonvolatile Write)
VCC Current (Standby)
ILI
ILO
VIH
VIL
VOL
VOH
VOH
Input Leakage Current
Output Leakage Current
Input HIGH Voltage
Input LOW Voltage
Output LOW Voltage
Output HIGH Voltage
Output HIGH Voltage
Limits
Min.
Max.
(Note 18) Typ. (Note 18)
400
1
5
3
VCC x 0.7
-1
VCC - 0.8
VCC - 0.4
10
10
VCC + 1
VCC x 0.3
0.4
Units
μA
mA
μA
μA
μA
V
V
V
V
V
Test Conditions
fSCK = 2.5 MHz, SO = Open, VCC = 6V
Other Inputs = VSS
fSCK = 2.5MHz, SO = Open, VCC = 6V
Other Inputs = VSS
SCK = SI = VSS, Addr. = VSS,
CS = VCC = 6V
VIN = VSS to VCC
VOUT = VSS to VCC
IOL = 3mA
IOH = -1mA, VCC ≥ +3V
IOH = -0.4mA, VCC ≤ +3V
ENDURANCE AND DATA RETENTION
Parameter
Minimum Endurance
Data Retention
Min.
(Note 18)
100,000
100
Units
Data changes per bit per register
Years
CAPACITANCE
Symbol
CIN/OUT (Note 16)
COUT (Note 16)
CIN (Note 16)
Test
Input / Output Capacitance (SI)
Output Capacitance (SO)
Input Capacitance (A0, CS, WP, HOLD, and
SCK)
Max.
(Note 18)
8
8
6
Units
pF
pF
pF
Test Conditions
VOUT = 0V
VOUT = 0V
VIN = 0V
POWER-UP TIMING
Symbol
tr VCC (Note 16)
tPUR (Note 17)
tPUW (Note 17)
Parameter
VCC Power-up Rate
Power-up to Initiation of Read Operation
Power-up to Initiation of Write Operation
Min.
(Note 18)
0.2
Max.
(Note 18)
50
1
50
Units
V/ms
ms
ms
A.C. TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
VCC x 0.1 to VCC x 0.9
10ns
Input and Output Timing Level
NOTES:
VCC x 0.5
16. This parameter is not 100% tested.
17. tPUR and tPUW are the delays required from the time the (last) power supply (VCC-) is stable until the specific instruction can be issued. These
parameters are periodically sampled and are not 100% tested.
18. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
15
FN8174.3
June 23, 2011