ISL6422B_15 Datasheet, PDF (15/19 Pages) Intersil Corporation – Dual Output LNB Supply and Control Voltage Regulator with I2C Interface for Advanced Satellite Set-Top Box Designs

ISL6422B
TABLE 17. COMMAND REGISTER SR7 CONFIGURATION
SR7H SR7M SR7L DCL2 VSPEN2 ISEL2R ISEL2H ISEL2L
FUNCTION
1
1
0
X
X
X
X
X SR7 is selected
1
1
0
0
X
0
X
X IOUT1 limit threshold = 305mA typ
1
1
0
0
X
1
0
0 IOUT1 limit threshold = 388mA typ
1
1
0
0
X
1
0
1 IOUT1 limit threshold = 570mA typ
1
1
0
0
X
1
1
0 IOUT1 limit threshold = 705mA typ
1
1
0
0
X
1
1
1 IOUT1 limit threshold = 890mA typ
1
1
0
1
X
X
X
X Dynamic current limit NOT selected
1
1
0
0
X
X
X
Dynamic current limit selected
1
1
0
X
0
X
X
X SELVTOP H/W pin Enabled
1
1
0
X
1
X
X
X SELVTOP H/W pin Disabled
NOTE: X indicates “Read Only” and is a “Don’t Care” for the Write mode.
TABLE 18. CONTROL REGISTER SR8 CONFIGURATION
SR8H SR8M SR8L EN2
X
X VTOP2 VBOT2
FUNCTION
1
1
1
1
X
X
0
0 SR4 is selected
1
1
1
1
X
X
0
0 VSPEN2 = SELVTOP2 = 0, VOUT1 = 13V, VBOOST1 = 13V + VDROP
1
1
1
1
X
X
0
1 VSPEN2 = SELVTOP2 = 0, VOUT1 = 14V, VBOOST1 = 14V + VDROP
1
1
1
1
X
X
1
0 VSPEN2 = SELVTOP2 = 0, VOUT1 = 13V, VBOOST1 = 13V + VDROP
1
1
1
1
X
X
1
1 VSPEN2 = SELVTOP2 = 0, VOUT1 = 14V, VBOOST1 = 14V + VDROP
1
1
1
1
X
X
0
0 VSPEN2 = 0, SELVTOP2 = 1, VOUT1 = 18V, VBOOST1 = 18V + VDROP
1
1
1
1
X
X
0
1 VSPEN2 = 0, SELVTOP2 = 1, VOUT1 = 18V, VBOOST1 = 18V + VDROP
1
1
1
1
X
X
1
0 VSPEN2 = 0, SELVTOP2 = 1, VOUT1 = 19V, VBOOST1 = 19V + VDROP
1
1
1
1
X
X
1
1 VSPEN2 = 0, SELVTOP2 = 1, VOUT1 = 19V, VBOOST1 = 19V + VDROP
1
1
1
1
X
X
0
0 VSPEN2 = 1, SELVTOP2 = X VOUT1 = 13V, VBOOST1 = 13V + VDROP
1
1
1
1
X
X
0
1 VSPEN2 = 1, SELVTOP2 = X VOUT1 = 14V, VBOOST1 = 14V + VDROP
1
1
1
1
X
X
1
0 VSPEN2 = 1, SELVTOP2 = X VOUT1 = 18V, VBOOST1 = 18V + VDROP
1
1
1
1
X
X
1
1 VSPEN2 = 1, SELVTOP2 = X VOUT1 = 19V, VBOOST1 = 19V + VDROP
1
1
1
0
X
X
X
X PWM and Linear for Channel 1 disabled
NOTE: X indicates “Read Only” and is a “Don’t Care” for the Write mode.
Received Data (I²C bus READ MODE)
The ISL6422B can provide to the master a copy of the
system register information via the I²C bus in read mode.
The read mode is Master activated by sending the chip
address with R/W bit set to 1. At the following Master
generated clock bits, the ISL6422B issues a byte on the
SDA data bus line (MSB transmitted first).
At the ninth clock bit the MCU master can:
• Acknowledge the reception, starting in this way the
transmission of another byte from the ISL6422B.
• Not acknowledge, stopping the read mode
communication.
While the whole register is read back by the microprocessor,
the read-only bits, OUC1, OUC2 - Over or Undercurrent bit,
UV1, UV2 - Over or Undervoltage bit, TPR1, TPR2 - Tone
present bit, OTF - Over-temperature fault bit convey
diagnostic information about the ISL6422B.
Power–On I²C Interface Reset
The I²C interface built into the ISL6422B is automatically reset
at power-on. The I²C interface block will receive a Power OK
logic signal from the UVLO circuit. This signal will go HIGH
when chip power is OK. As long as this signal is LOW, the
interface will not respond to any I²C commands and the
system register SR1 and SR2 are initialized to all zeros, thus
15
FN6486.2
September 8, 2015