ISL1903 Datasheet, PDF (15/19 Pages) Intersil Corporation – Dimmable Buck LED Driver - AC Mains or DC Input LED Driver

ISL1903
AC Detection and Reference Generation
The ISL1903 creates a 0 to 0.5V reference for the LED current
control loop by measuring the conduction angle of the AC input
voltage. The reference changes only with conduction angle and is
virtually unaffected by variation in either voltage amplitude or
frequency.
The ISL1903 cannot detect the conduction angle by monitoring
the input voltage directly. The AC voltage does not track the
source voltage on the load side of the dimmer once the input
voltage drops below the output voltage. In the buck topology the
converter stops drawing current from the AC line once the
instantaneous input voltage drops below the output voltage. This
results in commutation of the dimmer triac which leaves a
residual voltage on the input capacitance and impedes/prevents
the detection of the conduction angle. Instead, the conduction
angle is detected indirectly, either by monitoring the drain-source
voltage of the switching FET or by using an auxiliary winding on
the inductor. When the dimmer is blocking, the switching FET,
although switching, has no drain-source voltage and transfers no
power. If an auxiliary winding is present, it is not energized.
AC
EMI
FILTER
ISL1903
R1
1
16
2
15
3
14
4
13
5
AC 12
R2
C1
6
11
7
10
8
9
FIGURE 10. AC DETECTION
Referring to Figure 10, capacitor C1 is added to filter the scaled
switching waveform of the FET drain-source voltage, and delays
the detection of the loss of AC voltage. This has the effect of
masking the conduction angle reduction caused by the buck
topology as well as that due to variation in maximum dimmer
conduction angles between manufacturers.
The AC pin has an input range of 0 to 4V. The peak of the input
signal should range between 1 and 4 volts for best accuracy. The
AC detection circuit measures both the duration of the AC
conduction angle and the half-cycle duration. By comparing the
two every half-cycle, the detection circuit creates a frequency
independent reference that is updated each AC half-cycle.
In the event of an AC outage, the AC mains frequency reference
is lost. The ISL1903 will force the reference to zero volts and
reset the soft-start circuit approximately 35ms after the last AC
zero crossing is detected. If AC is held above its detection
threshold for the same duration, the internal reference is forced
to its maximum of ~0.5V.
AC may be directly coupled to a 90Hz to 130Hz PWM signal to
generate a reference if dimming is desired without using an AC
dimmer.
Primary Current Sensing
The ISL1903 is configured to regulate the output current by
monitoring the primary switch current at the OC pin. The peak
primary switch current is captured, processed, and output on
IOUT as a DC signal that is amplitude modulated in proportion to
the output current. The IOUT amplitude is equivalent to 4x the
peak switch current during the previous ON-time. It must be
scaled before being input to the control loop at the FB pin.
The OC pin also provides cycle-by-cycle overcurrent protection.
The ON-time is terminated if OC exceeds 0.6V nominal. There is
~120ns of leading edge blanking (LEB) on OC to minimize or
eliminate external filtering.
Dimming
The ISL1903 supports both PWM and DC current modulation
dimming. In either case, the control loop determines the average
current delivered to the load. PWM dimming is not
recommended for non-isolated applications requiring PFC. The
PWM dimming method will cause high harmonic content due to
the low PWM dimming frequency.
The usual method of dimming an LED string is to modulate the
DC current through the string. DC current dimming is the lower
cost method, but results in a non-linear dimming characteristic
due to the increasing efficacy of the LEDs as current is reduced.
PWM dimming results in linear dimming behavior.
For PWM dimming, an external FET, controlled by PWMOUT, is
required to gate the drive signal to the switching FET. See “Typical
Application - DC Input Dimmable Buck LED Driver” on page 4 for
an example. When PWMOUT is high, the main switching FET
operates normally. When PWMOUT is low, the main switching
FET gate signal is blocked and the converter is effectively off.
Regardless of the dimming method used, the control loop
determines the average current delivered to the load. It does not
matter if the load current is DC or pulsed, the converter control
loop and output capacitance operate to filter and average the
converter output current independently of the actual load current
waveform.
The dimming PWM and control loop are linked together such that
the PWM duty cycle tracks the main control loop reference
setpoint. If the control loop is set for 50% load, for example, the
dimming PWM duty cycle is set for 50%. The LED current will be
at 100% load for 50% of the time and 0% load for 50% of the
time, which averages to the 50% average load setpoint. See
Figures 7 and 9 for a graphical representation of the relationship
between the control loop reference and PWMOUT duty cycle. If
PWM dimming is used, the control loop bandwidth must be
reduced significantly below the PWM dimming frequency. It
should be noted that the PWMOUT duty cycle is not allowed to go
to zero.
15
FN8285.1
September 20, 2012