ISL55141_11 Datasheet, PDF (14/14 Pages) Intersil Corporation – High-Speed 18V CMOS Comparators

ISL55141, ISL55142, ISL55143
Package Outline Drawing
L36.6x6
36 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 5, 08/08
6.00
6
PIN 1
INDEX AREA
A
32 x 0.50
6
B
28
36
PIN #1 INDEX AREA
27
1
4X 4.00
4.15 +0.10/-0.15
(4X) 0.15
( 5.65 )
( 4.15)
Exp. Dap.
TOP VIEW
( 5.65 )
( 4.15)
Exp. Dap.
19
36 X 0.55 ± 0.10
9
18
10
BOTTOM VIEW
36 X 0.25 +0.05/-.07 ₄
0.10M C A B
( 32 x 0.50)
Max 0.80
SIDE VIEW
SEE DETAIL "X"
0.10 C _C
0.08C
(36 X .25)
( 4 X 4.00)
(36X 0.75)
TYPICAL RECOMMENDED LAND PATTERN
C 0.2 REF ⁵
0.00 MIN.
0.05 MAX.
DETAIL "X"
1. Dimensions are in millimeters.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
14
FN6230.2
March 1, 2011