HC55171 Datasheet, PDF (14/18 Pages) Intersil Corporation – 5 REN Ringing SLIC for ISDN Modem/TA and WLL

HC55171
Loop Detector Interface
The RTD output should be monitored for off hook detection
during the ringing period. At all other times, the SHD should
be monitored for off hook detection. The application circuit
can be modified to redirect the ring trip information through
the SHD interface. The change can be made by rewiring the
application circuit, adding a pullup resistor to pin 23 and set-
ting F0 low for the entire duration of the ringing period. The
modifications to the application circuit for the single detector
interface are shown in Figure 16.
HC55171
ADDITIONAL PULL UP RESISTOR
NU 23
RDI 20
RDO 21
V_RING 24
V_CC
D_TRAP
R_TRAP
C_TRAP
V_RING
FIGURE 16. APPLICATION CIRCUIT WIRING FOR SINGLE
LOOP DETECTOR INTERFACE
SLIC Operating State During Ringing
The SLIC control pin F1 should always be a logic high during
ringing. The control pin F0 will either be a constant logic high
(two detector interface) or a logic low (single detector inter-
face). Figure 17 shows the control interface for the dual
detector interface and the single detector interface.
Additional Application Information
(DUAL DETECTOR INTERFACE)
MODE ACTIVE
(LOGIC HI)
F1 _{(LOGIC HI)}
F0
RINGING
V_RING
VALID DET
SHD
RTD
ACTIVE
SHD
MODE
(SINGLE DETECTOR INTERFACE)
ACTIVE
RINGING
(LOGIC HI)
F1 _{(LOGIC HI)}
F0
V_RING
VALID DET
SHD
SHD
ACTIVE
SHD
FIGURE 17. DETECTOR LOGIC INTERFACES
Tip-to-Ring Open Circuit Voltage
The tip-to-ring open-circuit voltage, V_OC, of the HC55171
may be programmed to meet a variety of applications. The
design of the HC5517 defaults the value of V_OC to:
V_OC ≅ V_BAT – 8
Using a zener diode clamping circuit, the default open circuit
voltage of the SLIC may be defeated. Some applications that
have to meet Maintenance Termination Unit (MTU) compli-
ance have a few options with the HC55171. One option is to
reduce the ringing battery voltage until MTU compliance is
achieved. Another option is to use a zener clamping circuit
on V_REF to over ride the default open circuit voltage when
operating from a high battery.
If a clamping network is used it is important that it is disabled
during ringing. The clamping network must be disabled to
allow the SLIC to achieve its full ringing capability. A zener
clamping circuit is provided in Figure 18.
HC55171
C_IL
V_REF 3
+5V
47kΩ
2N2907
EN
FIGURE 18. ZENER CLAMP CIRCUIT WITH DISABLE
The following equations are used to predict the DC output of
the ring feed amplifier when using the zener clamping net-
work, V_RDC.
V_{-----B-2---A----T- < VZ}
V_RDC
=
2


V_{-----B-2---A----T-}
+4
(EQ. 33)
-^V----^B----^A----^T-
2
≥ V_Z
V_RDC = 2(–V_Z + (V_CE – V_BE)) + 4 ^{(EQ. 34)}
Where V_Z is the zener diode voltage and V_CE and V_BE are
the saturation voltages of the pnp transistor. Using Equa-
tions 31 and 32, the tip-to-ring open-circuit voltage can be
calculated for any value of zener diode and battery voltage.
-^V----^B----^A----^T-
2
< V_Z
V_OC
=
V_T
D
C
–
2


-^V----^B-₂---^A----^T-_
–4
(EQ. 35)
V_{-----B-2---A----T- ≥ VZ}
V_OC = V_TDC – 2(–V_Z + (V_CE – V_BE)) – 4
(EQ. 36)
When the base of the pnp transistor is pulled high (+5V), the
transistor is off and the zener clamp is disabled. When the
base of the transistor is pulled low (0V) the transistor is on
and the zener will clamp as long as half the battery voltage is
greater than the zener voltage.
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