HC55171 Datasheet, PDF (13/18 Pages) Intersil Corporation – 5 REN Ringing SLIC for ISDN Modem/TA and WLL

HC55171
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LOOP IMPEDANCE
FIGURE 11. RMS RINGING VOLTAGE vs LOOP LENGTH REN = 1
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LOOP IMPEDANCE
FIGURE 12. RMS RINGING VOLTAGE vs LOOP LENGTH REN = 2
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LOOP IMPEDANCE
FIGURE 13. RMS RINGING VOLTAGE vs LOOP LENGTH REN = 3
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LOOP IMPEDANCE
FIGURE 14. RMS RINGING VOLTAGE vs LOOP LENGTH REN = 4
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FIGURE 15. RMS RINGING VOLTAGE vs LOOP LENGTH REN = 5
Low Level Ringing Interface
The trapezoidal application circuit only requires a cadenced
logic signal applied to the wave shaping RC network to
achieve ringing. When not ringing, the logic signal should be
held low. When the logic signal is low, Tip will be near
ground and Ring will be near battery. When the logic signal
is high, Tip will be near battery and Ring will be near ground.
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