X9523_06 Datasheet, PDF (13/28 Pages) Intersil Corporation – Laser Diode Control for Fiber Optic Modules

X9523
WP: Write Protection Pin
When the Write Protection (WP) pin is active (HIGH), it
disables nonvolatile write operations to the X9523.
The table (X9523 Write Permission Status) summarizes
the effect of the WP pin (and DCP Write Lock), on the
write permission status of the device.
Additional Data Protection Features
In addition to the preceding features, the X9523 also
incorporates the following data protection functionality:
—The proper clock count and data bit sequence is
required prior to the STOP bit in order to start a nonvol-
atile write cycle.
VOLTAGE MONITORING FUNCTIONS
V1 / Vcc Monitoring
The X9523 monitors the supply voltage and drives the
V1RO output HIGH (using an external “pull up” resistor)
if V1/Vcc is lower than V_TRIP1 threshold. The V1RO
output will remain HIGH until V1/Vcc exceeds V_TRIP1
for a minimum time of t_PURST. After this time, the
V1RO pin is driven to a LOW state. See Figure 25.
For the Power-on/Low Voltage Reset function of the
X9523, the V1RO output may be driven HIGH down to a
V1/Vcc of 1V (V_RVALID). See Figure 25. Another feature
of the X9523, is that the value of t_PURST may be selected
in software via the CONSTAT register (See “POR1,
POR0: Power-on Reset bits - (Nonvolatile)” on page 11.).
V1 / Vcc
0 Volts
V_TRIP1
MR
0 Volts
V1RO
0 Volts
t_PURST
Figure 15. Manual Reset Response
Vx
V_TRIPx
0V
VxRO
0V
V1 / Vcc
0 Volts
V_TRIP1
(x = 2,3)
Figure 16. Voltage Monitor Response
It is recommended to stop communication to the device
while while V1RO is HIGH. Also, setting the Manual
Reset (MR) pin HIGH overrides the Power-on/Low
Voltage circuitry and forces the V1RO output pin HIGH
(See "Manual Reset").
Manual Reset
The V1RO output can be forced HIGH externally using
the Manual Reset (MR) input. MR is a de-bounced, TTL
compatible input, and so it may be operated by connect-
ing a push-button directly from V1/Vcc to the MR pin.
V1RO remains HIGH for time t_PURST after MR has
returned to its LOW state (See Figure 15). An external
“pull down” resistor is required to hold this pin (nor-
mally) LOW.
V2 monitoring
The X9523 asserts the V2RO output HIGH if the volt-
age V2 exceeds the corresponding V_TRIP2 threshold
(See Figure 16). The bit V2OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V2RO output may remain active HIGH with V_CC
down to 1V.
V3 monitoring
The X9523 asserts the V3RO output HIGH if the volt-
age V3 exceeds the corresponding V_TRIP3 threshold
(See Figure 16). The bit V3OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V3RO output may remain active HIGH with V_CC
down to 1V.
13
FN8209.1
January 3, 2006