X9258_11 Datasheet, PDF (13/20 Pages) Intersil Corporation – Quad Digital Controlled Potentiometers(XDCP™)

X9258
Power-Up and Power-Down Requirement
The are no restrictions on the sequencing of the bias supplies
V_CC, V+, and V- provided that all three supplies reach their final
values within 1ms of each other. At all times, the voltages on
the potentiometer pins must be less than V+ and more than V-.
The recall of the wiper position from nonvolatile memory is not
in effect until all supplies reach their final value. The V_CC ramp
rate specification is always in effect.
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Level
V_CC x 0.1 to V_CC x 0.9
10ns
V_CC x 0.5
Equivalent AC Load Circuit
5V
2.7V
1533Ω
SDA OUTPUT
100pF
100pF
13
FN8168.5
April 14, 2011