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ISL6731A Datasheet, PDF (13/20 Pages) Intersil Corporation – Power Factor Correction Controllers
ISL6731A, ISL6731B
Protection Circuits
Input Brownout, BO Protection
Brownout occurs when there is a drop in the line voltage. The BO
pin is a dual function pin. The BO pin detects the brownout
condition and shuts down the gate driver and controller. During
normal operation, the BO pin is used to compensate the effect of
the input line voltage change on the voltage loop. To keep the
harmonic distortion low, the corner frequency formed by the RBO
and CBO should be lower than 6Hz.
The BO pin is the output of the average voltage of the rectified
voltage. The PFC controller is turned off when the BO pin drops
below 0.4V. This protects the PFC power stage to enable
operation at or below brownout condition for long periods of
time. The controller resumes operation when the BO pin returns
to 0.5V.
The BO pin is usually connected to GND through a capacitor, CBO.
To avoid distortion on the VIN pin, select CBO so that:
CBO » 0.22F
(EQ. 6)
Overcurrent Protection
The peak current limit function prevents the inductor from
saturation. The gate driver turns off when the current goes above
the current limit set point.
Overpower Protection
The overpower protection is implemented by limiting the COMP
pin voltage higher than 3.85V (typical).
Overvoltage Protection
If the voltage on the FB pin exceeds the reference voltage VREF by
about 4%, the gate driver is turned off.
If the voltage on the OVP pin exceeds the VREF by about 4.5%, the
gate driver is turned off.
The controller resumes normal operation after both OVP and FB
pin drops below VREF.
Over-Temperature Protection
The ISL6731A and ISL6731B are protected against
over-temperature conditions. When the junction temperature
exceeds +160°C, the PWM shuts down. Normal operation is
resumed when the junction temperature decreases below +135°C.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to another
can generate voltage transients across the impedances of the
interconnecting bond wires and circuit traces. These
interconnecting impedances should be minimized by using wide,
short printed circuit traces. The critical components should be
located as close together as possible using ground plane
construction or single point grounding.
Figure 14 shows the critical power components; Q1, D and COUT.
To minimize the voltage overshoot, the interconnecting wires
indicated by heavy lines should be part of the ground or the
power plane in a printed circuit board. The components shown in
Figure 14 should be located as close together as possible. Please
note that the capacitors CVCC and CO each represent numerous
physical capacitors. Locate the ISL6731A or ISL6731B within 2
inches of the MOSFET, Q1. The circuit traces for the MOSFETs’
gate and source connections from the ISL6731A and ISL6731B
must be sized to handle up to 1.5A peak current.
D
L
Q1
COUT
GATE
VCC
CVCC
FIGURE 14. CRITICAL CURRENT POWER COMPONENTS
Component Selection Guidelines
A 300W, universal input, PFC converter design is provided for
demonstration. The design method is for a continuous current
mode power factor correction boost converter with the
ISL6731B. The switching frequency is 62kHz.
Tables 3 shows the design parameters.
TABLE 3. CONVERTER DESIGN PARAMETERS
PARAMETER
CONDITIONS
MIN TYP MAX UNIT
VLINE
90
FLINE
47
POMAX Maximum Output Power
THOLD
Hold Up Time
Efficiency
VLINE = 115VAC
92
115/230 265 VAC
63 Hz
300 W
20
ms
%
BOOST INDUCTOR SELECTION
First, calculate the maximum input RMS current, IINMAX.
IINMAX = --------P--V--O--R---M-M----A-S--X--m-----i-n--
(EQ. 7)
Where is the converter efficiency at VRMSmin. PF is the power
factor at VRMSmin.
IINMAX = 0----.-9--3--2-0---0----W-9---0----V-- = 3.62A
(EQ. 8)
Assuming the current is sinusoidal and the peak-to-peak ripple at
line is 40%.
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FN8582.1
February 13, 2015