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ISL6341ACRZ-T Datasheet, PDF (13/17 Pages) Intersil Corporation – 5V or 12V Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
ISL6341, ISL6341A, ISL6341B, ISL6341C
.
VIN
ISL6341x
UGATE
Q1
PHASE
LGATE/OCSET
Q2
LO
VOUT
CIN
CO
RETURN
FIGURE 11. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
Figure 11 shows the critical power components of the
converter. To minimize the voltage overshoot, the
interconnecting wires indicated by heavy lines should be part of
a ground or power plane in a printed circuit board. The
components shown should be located as close together as
possible. Please note that the capacitors CIN and CO may each
represent numerous physical capacitors. For best results,
locate the ISL6341x within 1 inch of the MOSFETs, Q1 and Q2.
The circuit traces for the MOSFET gate and source
connections from the ISL6341x must be sized to handle up to
2A peak current.
+VGD
VOUT
VOS
COMP/EN
FB
+VCC
VCC
ISL6341x
BOOT
CBOOT
PHASE
LGATE/OCSET
CVCC
GND
ROCSET
+VIN
Q1 LO
VOUT
Q2 CO
FIGURE 12. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
Figure 12 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Provide local VCC
decoupling between VCC and GND pins. Locate the
capacitor, CBOOT as close as practical to the BOOT and
PHASE pins. Locate the resistor, ROSCET close to the
LGATE/OCSET pin because the internal current source is
only 10µA. Minimize any leakage current paths on the
COMP/EN pin. All components used for feedback
compensation and VOS resistor divider (inside the dotted
box) should be located as close to the IC as practical. Near
the load, pick a point VOUT that will be the regulation center;
run a single unloaded narrow trace from there to the
compensation components. The same trace can also be
used for VOS divider.
Feedback Compensation
This section highlights the design consideration for a
voltage-mode controller requiring external compensation. To
address a broad range of applications, a type-3 feedback
network is recommended, as shown in the top part of
Figure 13.
Figure 13 also highlights the voltage-mode control loop for a
synchronous-rectified buck converter, applicable to the
ISL6341x circuit. The output voltage (VOUT) is regulated to
the reference voltage, VREF. The error amplifier output
(COMP pin voltage) is compared with the oscillator (OSC)
modified sawtooth wave to provide a pulse-width modulated
wave with an amplitude of VIN at the PHASE node. The
PWM wave is smoothed by the output filter (L and C). The
output filter capacitor bank’s equivalent series resistance is
represented by the series resistor E.
The modulator transfer function is the small-signal transfer
function of VOUT/VCOMP. This function is dominated by a DC
gain, given by dMAXVIN/VOSC, and shaped by the output
filter, with a double pole break frequency at FLC and a zero at
FCE. For the purpose of this analysis, L and D represent the
channel inductance and its DCR, while C and E represent the
total output capacitance and its equivalent series resistance.
FLC=
-------------1--------------
2π ⋅ L ⋅ C
FCE= 2----π-----⋅--1-C------⋅---E--
(EQ. 3)
C2
COMP
R2 C1
R3 C3
-
E/A +
FB
R1
Ro
VREF
OSCILLATOR
PWM
CIRCUIT
VOSC
HALF-BRIDGE
DRIVE
VIN
L
UGATE
PHASE
LGATE
VOUT
D
C
E
ISL6341x
EXTERNAL CIRCUIT
FIGURE 13. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN
13
FN6538.2
December 2, 2008