HI7191 Datasheet, PDF(13/24 Page) Intersil Corporation – 24-Bit, High Precision, Sigma Delta A/D Converter

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HI7191 Datasheet, PDF (13/24 Pages) Intersil Corporation – 24-Bit, High Precision, Sigma Delta A/D Converter

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HI7191

TABLE 4. HI7191 OPERATIONAL MODES

MD2

MD1

MD0

OPERATIONAL MODE

0 Conversion

1 Self Calibration (Gain of 1 only)

0 System Offset Calibration

1 System Positive Full Scale Calibration

0 System Negative Full Scale Calibration

1 System Offset/Internal Gain Calibration

(Gain of 1 only)

0 System Gain Calibration

1 Reserved

Conversion Mode

For Conversion Mode operation the HI7191 converts the dif-

ferential voltage between VINHI and VINLO . From switching

into this mode it takes 3 conversion periods (3 x 1/fN) for

DRDY to go low and new data to be valid. No calibration

coefï¬cients are generated when operating in Conversion

Mode as data is calibrated using the existing calibration

coefï¬cients.

Self-Calibration Mode

Please note: Self-calibration is only valid when operating

in a gain of one. In addition, the offset and gain errors are

not reduced as with the full system calibration.

The Self-Calibration Mode is a three step process that

updates the Offset Calibration Register, the Positive Full

Scale Calibration Register, and the Negative Full Scale Cali-

bration Register. In this mode an internal offset calibration is

done by disconnecting the external inputs and shorting the

inputs of the PGIA together. After 3 conversion periods the

Offset Calibration Register is updated with the value that

corrects any internal offset errors.

After the offset calibration is completed the Positive and

Negative Full Scale Calibration Registers are updated. The

inputs VINHI and VINLO are disconnected and the external

reference is applied across the modulator inputs. The

HI7191 then takes 3 conversion cycles to sample the data

and update the Positive Full Scale Calibration Register. Next

the polarity of the reference voltage across the modulator

input terminals is reversed and after 3 conversion cycles the

Negative Full Scale Calibration Register is updated. The

values stored in the Positive and Negative Full Scale

Calibration Registers correct for any internal gain errors in

the A/D transfer function. After 3 more conversion cycles the

DRDY line will activate signaling that the calibration is com-

plete and valid data is present in the Data Output Register.

System Offset Calibration Mode

The System Offset Calibration Mode is a single step process

that allows the user to lump offset errors of external circuitry

and the internal errors of the HI7191 together and null them

out. This mode will convert the external differential signal

applied to the VIN inputs and then store that value in the Off-

set Calibration Register. The user must apply the zero point

or offset voltage to the HI7191 analog inputs and allow the

signal to settle before selecting this mode. After 4 conver-

sion periods the DRDY line will activate signaling that the

calibration is complete and valid data is present in the Data

Output Register.

System Positive Full Scale Calibration Mode

The System Positive Full Scale Calibration Mode is a single

step process that allows the user to lump gain errors of

external circuitry and the internal errors of the HI7191

together and null them out. This mode will convert the exter-

nal differential signal applied to the VIN inputs and stores the

converted value in the Positive Full Scale Calibration Regis-

ter. The user must apply the +Full Scale voltage to the

HI7191 analog inputs and allow the signal to settle before

selecting this mode. After 4 conversion periods the DRDY

line will activate signaling the calibration is complete and

valid data is present in the Data Output Register.

System Negative Full Scale Calibration Mode

The System Negative Full Scale Calibration Mode is a

single-step process that allows the user to lump gain errors

of external circuitry and the internal errors of the HI7191

together and null them out. This mode will convert the exter-

nal differential signal applied to the VIN inputs and stores the

converted value in the Negative Full Scale Calibration Regis-

ter. The user must apply the -Full Scale voltage to the

HI7191 analog inputs and allow the signal to settle before

selecting this mode. After 4 conversion periods the DRDY

line will activate signaling the calibration is complete and

valid data is present in the Data Output Register.

System Offset/Internal Gain Calibration Mode

Please note: System Offset/Internal Gain is only valid

when operating in a gain of one. In addition, the offset and

gain errors are not reduced as with the full system calibra-

tion.

The System Offset/Internal Gain Calibration Mode is a single

step process that updates the Offset Calibration Register,

the Positive Full Scale Calibration Register, and the Negative

Full Scale Calibration Register. First the external differential

signal applied to the VIN inputs is converted and that value is

stored in the Offset Calibration Register. The user must

apply the zero point or offset voltage to the HI7191 analog

inputs and allow the signal to settle before selecting this

mode.

After this is completed the Positive and Negative Full Scale

Calibration Registers are updated. The inputs VINHI and VINLO

are disconnected and the external reference is switched in. The

HI7191 then takes 3 conversion cycles to sample the data and

update the Positive Full Scale Calibration Register. Next the

polarity of the reference voltage across the VINHI and VINLO

terminals is reversed and after 3 conversion cycles the

Negative Full Calibration Register is updated. The values

stored in the Positive and Negative Full Scale Calibration

Registers correct for any internal gain errors in the A/D transfer

function. After 3 more conversion cycles, the DRDY line will

activate signaling that the calibration is complete and valid data

is present in the Data Output Register.

1909

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