ISL78205 Datasheet, PDF (12/16 Pages) Intersil Corporation – 2.5A Buck Controller with Integrated High-Side MOSFET

ISL78205
Functional Description
Initialization
Initially, the ISL78205 continually monitors the voltage at the EN
pin. When the voltage on the EN pin exceeds its rising threshold,
the internal LDO will start-up to build up VCC. After Power-On
Reset (POR) circuits detect that the VCC voltage has exceeded
the POR threshold, the soft-start will be initiated.
Soft-Start
The soft-start (SS) ramp is built up in the external capacitor on
the SS pin that is charged by an internal 5µA current source.
C_SS[μF] = 6.5 ⋅ t_SS[S]
(EQ. 1)
The SS ramp starts from 0 to voltage above 0.8V. Once SS
reaches 0.8V, the bandgap reference takes over and IC gets into
steady state operation.
The SS plays a vital role in the hiccup mode of operation. The IC
works as cycle-by-cycle peak current limiting at over load
condition. When a harsh condition occurs and the current in the
upper side MOSFET reaches the second overcurrent threshold,
the SS pin is pulled to ground and a dummy soft-start cycle is
initiated. At dummy SS cycle, the current to charge the soft-start
cap is cut down to 1/5 of its normal value. Therefore, a dummy
SS cycle takes 5 times that of the regular SS cycle. During the
dummy SS period, the control loop is disabled and there is no
PWM output. At the end of this cycle, it will start the normal SS.
The hiccup mode persists until the second overcurrent threshold
is no longer reached.
The ISL78205 is capable of starting up with pre-biased output.
PWM Control
The ISL78205 employs the peak current mode PWM control for
fast transient response and cycle-by-cycle current limiting. See
the “Block Diagram” on page 4.
The PWM operation is initialized by the clock from the oscillator.
The upper MOSFET is turned on by the clock at the beginning of a
PWM cycle and the current in the MOSFET starts to ramp up.
When the sum of the current sense signal and the slope
compensation signal reaches the error amplifier output voltage
level, the PWM comparator is triggered to shut down the PWM
logic to turn off the high side MOSFET. The high side MOSFET
stays off until the next clock signal starts.
The output voltage is sensed by a resistor divider from V_OUT to FB
pin. The difference between the FB voltage and 0.8V reference is
amplified and compensated to generate the error voltage signal
at the COMP pin. Then the COMP pin signal is compared with the
current ramp signal to shut down the PWM.
Synchronous and
Non-Synchronous Buck
The ISL78205 supports both synchronous and non-synchronous
buck operations. For a non-synchronous buck operation when a
power diode is used as the low side power device, the LGATE
driver can be disabled with LGATE connected to VCC (before IC
start-up).
Input Voltage
With the part switching, the operating input voltage applied to
the VIN pins must be under 40V. This recommendation allows for
short voltage ringing spikes (within a couple of ns time range)
due to switching while not exceeding Absolute Maximum
Ratings.
Output Voltage
The ISL78205 output voltage can be programmed down to 0.8V
by a resistor divider from V_OUT to FB. The maximum achievable
voltage is (V_IN*D_MAX - V_DROP), where V_DROP is the voltage drop
in the power path, including mainly the MOSFET r_DS(ON) and
inductor DCR. The maximum duty cycle D_MAX is decided by
(1/Fs - t_{MIN_OFF}).
Output Current
With the high side MOSFET integrated, the maximum current
that the ISL78205 can support is decided by the package and
many operating conditions, including input voltage, output
voltage, duty cycle, switching frequency and temperature, etc.
First, the maximum DC output current is 5A limited by the
package.
Second, from the thermal perspective, the die temperature
shouldn’t be above +125°C with the power loss dissipated inside
of the IC. Figures 7 and 8 show the thermal performance of this
part operating at different conditions. Figure 7 shows 2A
applications under +25°C still air conditions. Different V_OUT (5V,
12V, 20V) applications thermal data are shown over V_IN range at
+25°C and still air. The temperature rise data in this Figure can
be used to estimate the die temperature at different ambient
temperatures under various operating conditions. Note that more
temperature rise is expected at higher ambient temperature due
to more conduction loss caused by r_DS(ON) increase. Figure 8
shows 5V output applications' thermal performance under
various output current and input voltage. It shows the
temperature rise trend with load and V_IN changes. The part can
output 2.5A under typical application conditions (V_IN 8~30V,
V_OUT 5V, 500kHz, still air and +85°C ambient conditions). The
output current should be derated under any conditions, causing
the die temperature to exceed +125°C.
Basically, the die temperature is equal to the sum of the ambient
temperature and the temperature rise resulting from the power
dissipated from the IC package with a certain junction to
ambient thermal impedance θ_JA. The power dissipated in the IC
is related to the MOSFET switching loss, conduction loss and the
internal LDO loss. Besides the load, these losses are also related
to input voltage, output voltage, duty cycle, switching frequency
and temperature. With the exposed pad at the bottom, the heat
of the IC mainly goes through the bottom pad and θ_JA is greatly
reduced. The θ_JA is highly related to layout and air flow
conditions. In layout, multiple vias (≥15) are strongly
recommended in the IC bottom pad. In addition, the bottom pad
with its vias should be placed in the ground copper plane with an
area as large as possible connected through multiple layers. The
θ_JA can be reduced further with air flow. With 100CFM air flow,
the θ_JA can be reduced by 25%.
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FN7926.0
September 22, 2011