ISL28127_10 Datasheet, PDF (12/23 Pages) Intersil Corporation – Precision Single and Dual Low Noise Operational Amplifiers

ISL28127, ISL28227
Output Current Limiting
The output current is internally limited to approximately
±45mA at +25°C and can withstand an short circuit to
either rail as long as the power dissipation limits are not
exceeded. This applies to only 1 amplifier at a time for
the dual op amp. Continuous operation under these
conditions may degrade long term reliability.
Output Phase Reversal
Output phase reversal is a change of polarity in the
amplifier transfer function when the input voltage
exceeds the supply voltage. The ISL28127 and ISL28227
are immune to output phase reversal, even when the
input voltage is 1V beyond the supplies.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply
conditions. It is therefore important to calculate the
maximum junction temperature (T_JMAX) for all
applications to determine if power supply voltages, load
conditions, or package type need to be modified to
remain in the safe operating area. These parameters are
related using Equation 1:
T_JMAX = T_MAX + θ_JAxPD_MAXTOTAL
(EQ. 1)
where:
• P_DMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PD_MAX)
• PD_MAX for each amplifier can be calculated using
Equation 2:
PD_MAX
=
V_S × I_qMAX + (V_S
-
V_OUTM
A
X
)
×
V_{-----O----U----T----M-----A----X--}
R_L
(EQ.2)
where:
• T_MAX = Maximum ambient temperature
• θ_JA = Thermal resistance of the package
• PD_MAX = Maximum power dissipation of 1 amplifier
• V_S = Total supply voltage
• I_qMAX = Maximum quiescent supply current of 1
amplifier
• V_OUTMAX = Maximum output voltage swing of the
application
R_L = Load resistance
ISL28127 and ISL28227 SPICE Model
Figure 28 shows the SPICE model schematic and
Figure 29 shows the net list for the ISL28127 and
ISL28227 SPICE model. The model is a simplified
version of the actual device and simulates important AC
and DC parameters. AC parameters incorporated into
the model are: 1/f and flatband noise, Slew Rate,
CMRR, Gain and Phase. The DC parameters are VOS,
IOS, total supply current and output voltage swing. The
model does not model input bias current. The model
uses typical parameters given in the “Electrical
Specifications” Table beginning on page 4. The AVOL is
adjusted for 128dB with the dominate pole at 5Hz. The
CMRR is set higher than the “Electrical Specifications”
Table to better match design simulations (150dB,
f = 50Hz). The input stage models the actual device to
present an accurate AC representation. The model is
configured for ambient temperature of +25°C.
Figures 30 through 45 show the characterization vs
simulation results for the Noise Voltage, Closed Loop
Gain vs Frequency, Closed Loop Gain vs Rf/Rg, Closed
Loop Gain vs RL, Closed Loop Gain vs CL, Large Signal
10V Step Response, Open Loop Gain Phase and
Simulated CMRR vs Frequency.
LICENSE STATEMENT
The information in this SPICE model is protected under
the United States copyright laws. Intersil Corporation
hereby grants users of this macro-model hereto referred
to as “Licensee”, a nonexclusive, nontransferable licence
to use this model as long as the Licensee abides by the
terms of this agreement. Before using this macro-model,
the Licensee should read this license. If the Licensee
does not accept these terms, permission to use the
model is not granted.
The Licensee may not sell, loan, rent, or license the
macro-model, in whole, in part, or in modified form, to
anyone outside the Licensee’s company. The Licensee
may modify the macro-model to suit his/her specific
applications, and the Licensee may make copies of this
macro-model for use within their company only.
This macro-model is provided “AS IS, WHERE IS, AND
WITH NO WARRANTY OF ANY KIND EITHER EXPRESSED
OR IMPLIED, INCLUDING BUY NOT LIMITED TO ANY
IMPLIED WARRANTIES OF MERCHANTABILITY AND
FITNESS FOR A PARTICULAR PURPOSE.”
In no event will Intersil be liable for special, collateral,
incidental, or consequential damages in connection with
or arising out of the use of this macro-model. Intersil
reserves the right to make changes to the product and
the macro-model without prior notice.
12
FN6633.3
March 18, 2010