ISL23415 Datasheet, PDF (12/19 Pages) Intersil Corporation – Single, Low Voltage Digitally Controlled Potentiometer (XDCP™)

ISL23415
Typical Performance Curves (Continued)
1V/DIV
1µs/DIV
1V/DIV
0.1s/DIV
VRW
CS RISING EDGE
FIGURE 21. WIPER LARGE SIGNAL SETTLING TIME
FIGURE 22. POWER-ON START-UP IN VOLTAGE DIVIDER MODE
CH1: 0.5V/DIV, 0.2µs/DIV RH PIN
1.2
CH2: 0.2V/DIV, 0.2µs/DIV RW PIN
1.0
0.8
V_CC = 5.5V, V_LOGIC = 5.5V
0.6
R_TOTAL = 10k
-3dB FREQUENCY = 1.4MHz AT MIDDLE TAP
FIGURE 23. 10k -3dB CUT OFF FREQUENCY
0.4
V_CC = 1.7V, V_LOGIC = 1.2V
0.2
0
-40
-15
10
35
60
85
110
TEMPERATURE (°C)
FIGURE 24. STANDBY CURRENT vs TEMPERATURE
Functional Pin Description
Potentiometers Pins
RH AND RL
The high (RH) and low (RL) terminals of the ISL23415 are
equivalent to the fixed terminals of a mechanical potentiometer.
The RH and RL are referenced to the relative position of the wiper
and not the voltage potential on the terminals. With the WR
register set to 255 decimal, the wiper will be closest to RH, and
with the WR register set to 0, the wiper is closest to RL.
RW
The RW is the wiper terminal, and it is equivalent to the
moveable terminal of a mechanical potentiometer. The position
of the wiper within the array is determined by the WR register.
Bus Interface Pins
SERIAL CLOCK (SCL)
This input is the serial clock of the SPI serial interface.
SERIAL DATA INPUT (SDI)
The SDI is a serial data input pin for SPI interface. It receives
operation code, wiper address and data from the SPI remote
host device. The data bits are shifted in at the rising edge of the
serial clock SCK, while the CS input is low.
SERIAL DATA OUTPUT (SDO)
The SDO is a serial data output pin. During a read cycle, the data
bits are shifted out on the falling edge of the serial clock SCK and
will be available to the master on the following rising edge of SCK.
The output type is configured through ACR[1] bit for Push-Pull or
Open Drain operation. Default setting for this pin is Push-Pull. An
12
FN7780.0
December 15, 2010