ICL3221EM_14 Datasheet, PDF (12/12 Pages) Intersil Corporation – ±15kV ESD Protected, +3V, 1μA, 250kbps, RS-232 Transmitters/Receivers

ISL3221EM
Thin Shrink Small Outline Plastic Packages (TSSOP)
N
INDEX
AREA
E
E1
-B-
0.25(0.010) M B M
GAUGE
PLANE
123
0.05(0.002) SEATING PLANE
-A-
D
A
L
0.25
0.010
-C-
α
e
A1
A2
c
b
0.10(0.004)
0.10(0.004) M C A M B S
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact. (Angles in degrees)
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN
MAX
MIN
MAX NOTES
A
-
0.043
-
1.10
-
A1
0.002 0.006
0.05
0.15
-
A2
0.033 0.037 0.85
0.95
-
b
0.0075 0.012 0.19
0.30
9
c
0.0035 0.008 0.09
0.20
-
D
0.193 0.201 4.90
5.10
3
E1
0.169 0.177 4.30
4.50
4
e
0.026 BSC
0.65 BSC
-
E
0.246 0.256 6.25
6.50
-
L
0.020 0.028 0.50
0.70
6
N
16
16
7
α
0^o
8^o
0^o
8^o
-
Rev. 1 2/02
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
12
FN7552.0
December 17, 2009