HC5523 Datasheet, PDF (12/18 Pages) Intersil Corporation – LSSGR/TR57 CO/Loop Carrier SLIC with Low Power Standby

HC5523
and R₂. This results in a current (I_GK) out of the
transconductance amplifier (gm₂) that is equal to the product
of gm₂ and the differential (I_TIP -I_RING) loop current. If I_GK is
less than the internal current source (I₁), then diode D₁ is on
and the output of the ground key comparator is low. If I_GK is
greater than the internal current source (I₁), then diode D₂ is
on and the output of the ground key comparator is high. With
the output of the ground key comparator high, and the logic
configured for ground key detect, the DET pin goes low. The
ground key detector has a built in hysteresis of typically 5mA
between its trigger and reset values.
Ring Trip Detector
Ring trip detection is accomplished with the internal ring trip
comparator and the external circuitry shown in Figure 19.
The process of ring trip is initiated when the logic input pins
are in the following states: E0 = 0, E1 = 1/0, C1 = 1 and
C2 = 0. This logic condition connects the ring trip
comparator to the DET output, and causes the Ringrly pin to
energize the ring relay. The ring relay connects the tip and
ring of the phone to the external circuitry in Figure 19. When
the phone is on-hook the DT pin is more positive than the
DR pin and the DET output is high. For off-hook conditions
DR is more positive than DT and DET goes low. When DET
goes low, indicating that the phone has gone off-hook, the
SLIC is commanded by the logic inputs to go into the active
state. In the active state, tip and ring are once again
connected to the phone and normal operation ensues.
Figure 19 illustrates battery backed unbalanced ring injected
ringing. For tip injected ringing just reverse the leads to the
phone. The ringing source could also be balanced.
NOTE: The DET output will toggle at 20Hz because the DT input is
not completely filtered by C_RT. Software can examine the duty cycle
and determine if the DET pin is low for more that half the time, if so
the off-hook condition is indicated.
R_RT
R₃^CRT
TIP
R₄
E_RG
R₁
DT
-
+
DR
R₂
RING TRIP
COMPARATOR
DET
RING
RING
RELAY
V_BAT
RINGRLY
HC5523
FIGURE 19. RING TRIP CIRCUIT FOR BATTERY BACKED
RINGING
Longitudinal Impedance
The feedback loop described in Figure 20(A, B) realizes the
desired longitudinal impedances from tip to ground and from
ring to ground. Nominal longitudinal impedance is resistive
and in the order of 22Ω.
In the presence of longitudinal currents this circuit
attenuates the voltages that would otherwise appear at the
tip and ring terminals, to levels well within the common mode
range of the SLIC. In fact, longitudinal currents may exceed
the programmed DC loop current without disturbing the
SLIC’s VF transmission capabilities.
The function of this circuit is to maintain the tip and ring
voltages symmetrically around V_BAT/2, in the presence of
longitudinal currents. The differential transconductance
amplifiers G_T and G_R accomplish this by sourcing or sinking
the required current to maintain V_C at V_BAT/2.
When a longitudinal current is injected onto the tip and ring
inputs, the voltage at V_C moves from it’s equilibrium value
V_BAT/2. When V_C changes by the amount DVC, this change
appears between the input terminals of the differential
transconductance amplifiers G_T and G_R. The output of G_T
and G_R are the differential currents ∆I₁ and ∆I₂, which in
turn feed the differential inputs of current sources I_T and I_R
respectively. I_T and I_R have current gains of 250 single
ended and 500 differentially, thus leading to a change in I_T
and I_R that is equal to 500(∆I) and 500(∆I₂).
The circuit shown in Figure 20(B) illustrates the tip side of
the longitudinal network. The advantages of a differential
input current source are: improved noise since the noise due
to current source 2I_O is now correlated, power savings due
to differential current gain and minimized offset error at the
Operational Amplifier inputs via the two 5kΩ resistors.
Digital Logic Inputs
Table 1 is the logic truth table for the TTL compatible logic
input pins. The HC5523 has two enable inputs pins (E0, E1)
and two control inputs pins (C1, C2).
The enable pin E0 is used to enable or disable the DET
output pin. The DET pin is enabled if E0 is at a logic level 0
and disabled if E0 is at a logic level 1.
The enable pin E1 gates the ground key detector to the DET
output with a logic level 0, and gates the loop or ring trip
detector to the DET output with a logic level 1.
A combination of the control pins C1 and C2 is used to
select 1 of the 4 possible operating states. A description of
each operating state and the control logic follow:
Open Circuit State (C1 = 0, C2 = 0)
In this state the SLIC is effectively off. All detectors and both
the tip and ring line drive amplifiers are powered down,
presenting a high impedance to the line. Power dissipation is
at a minimum.
67