ISL6742B Datasheet, PDF (11/20 Pages) Intersil Corporation – Fast current sense to output delay

ISL6742B
Typical Performance Curves
1.02
1.01
1.00
0.99
0.98
-40 -25 -10 5 20 35 50 65 80 95 110
TEMPERATURE (°C)
FIGURE 4. REFERENCE VOLTAGE vs TEMPERATURE
25
24
23
22
21
20
19
18
0
200
400
600
800
RTD CURRENT (µA)
1000
FIGURE 5. CT DISCHARGE CURRENT GAIN vs RTD CURRENT
1•10⁴
1•10³
1•10³
CT =
1000pF
680pF
100
470pF
330pF
220pF
100pF
10 _{0 10 20 30 40 50 60 70 80 90 100}
RTD (kΩ)
FIGURE 6. DEAD TIME (DT) vs CAPACITANCE
100
10
0.1
1
CT (nF)
RTD =
10kΩ
50kΩ
100kΩ
10
FIGURE 7. CAPACITANCE vs FREQUENCY
Functional Description
Features
The ISL6742B PWM is an excellent choice for low cost bridge and
push-pull topologies in applications requiring accurate duty cycle
and dead time control. With its many protection and control
features, a highly flexible design with minimal external
components is possible. Among its many features are current- or
voltage-mode control, adjustable soft-start, peak and average
overcurrent protection, thermal protection, synchronous rectifier
outputs with variable delay/advance timing and adjustable
oscillator frequency.
Oscillator
The ISL6742B oscillator, with a programmable frequency range
to 2MHz, is set with only an external resistor and capacitor.
The switching period is the sum of the timing capacitor charge
and discharge durations. The charge duration is determined by
CT and a fixed 200µA internal current source. The discharge
duration is determined by RTD and CT.
t_C  11.5  10³  CT
S
(EQ. 1)
t_D  0.06  RTD  CT + 50  10^–9
S
(EQ. 2)
t_SW = t_C + t_D = _f--_S--¹--_W----
S
(EQ. 3)
Where t_C and t_D are the charge and discharge times,
respectively, t_SW is the oscillator period, and f_SW is the oscillator
frequency. Since the ISL6742B is a double-ended controller, one
output switching cycle requires two oscillator cycles. The actual
charge and discharge times will be slightly longer than
calculated due to internal propagation delays of approximately
10ns/transition. This delay adds directly to the switching
duration, but also causes slight overshoot of the timing capacitor
peak and valley voltage thresholds, effectively increasing the
peak-to-peak voltage on the timing capacitor. Additionally, if very
low discharge currents are used, there will be increased error due
to the input impedance at the CT pin.
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FN8565.1
November 3, 2015