ISL6425 Datasheet, PDF (11/12 Pages) Intersil Corporation – Single Output LNB Supply and Control Voltage Regulator with I2C Interface for Advanced Satellite Set-top Box Designs

ISL6425
Once Vcc rises above the UVLO level, the POWER OK
signal given to the I²C interface block will be HIGH, the I²C
interface becomes operative and the SR can be configured
by the main microprocessor. About 400mV of hysteresis is
provided in the UVLO threshold to avoid false triggering of
the Power-On reset circuit.
(I²C comes up with EN = 0, EN goes HIGH at the same time
as (or later than) all other I²C data for the PWM becomes
valid).
ADDRESS Pin
Connecting this pin to GND forces the chip I²C interface
address to 0001000; applying a voltage >2.7V forces the
address to 0001001, as shown below.
TABLE 7. ADDRESS PIN CHARACTERISTICS
VADDR
MIN
TYP
MAX
Vaddr-1
0V
“0001000”
-
2.0V
Vaddr-2
“0001001”
2.7V
-
5.0V
I²C Electrical Characteristics
TABLE 8. I²C SPECIFICATIONS
PARAMETER
TEST
CONDITION
MIN TYP
MAX
Input Logic High, SDA, SCL
VIH
0.7 x V_DD
Input Logic Low, SDA, SCL
VIL
0.3 x V_DD
Input Logic
Current, IIL
SDA, SCL;
0.4V < Vin < 4.5V
10µA
SCL Clock
Frequency
0 100kHz 400kHz
11
FN9176.1
February 8, 2005