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ISL6263B Datasheet, PDF (11/18 Pages) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator with Current Monitor for IMVP-6+ Santa Rosa GPU Core
ISL6263B
+
Σ
+
VDIFF
VDD
−
OCP
+
+
−
10µA ↓
OCSET
+
DROOP
−
VSUM
DFB
DROOP
VO
VSEN
+
RTN
−
ROCSET
PHASE
RS
CFILTER1
RFILTER1
RFILTER2
CFILTER2
CFILTER3
LOUT
DCR
COUT
ESR
TO
VCC_SNS PROCESSOR
SOCKET
VSS_SNS
KELVIN
CONNECTIONS
FIGURE 5. SIMPLIFIED VOLTAGE DROOP CIRCUIT WITH GPU SOCKET KELVIN SENSING AND INDUCTOR DCR CURRENT SENSING
Smooth mode transitions are facilitated by the R3 modulator
which correctly maintains the internally synthesized ripple
current information throughout mode transitions.
Current Monitor
The ISL6263B features a current monitor output. The
voltage between the IMON and VSS pins is proportional to
the output inductor current. The output inductor current is
proportional to the voltage between the DROOP and VO
pins. The IMON pin has source and sink capability for close
tracking of transient current events. The current monitor
output is expressed in Equation 1:
VIMON = (VDROOP – VO) ⋅ 31
(EQ. 1)
Protection
The ISL6263B provides overcurrent protection (OCP),
overvoltage protection (OVP), and undervoltage protection
(UVP) as shown in Table 3.
Overcurrent protection is tied to the voltage droop, which is
determined by the resistors selected in the Static Droop
Design Using DCR Sensing section. After the load line is set,
the OCSET resistor can be selected. The OCP threshold
detector is checked every 15µs and will increment a counter
if the OCP threshold is exceeded, conversely the counter will
be decremented if the load current is below the OCP
threshold. The counter will latch an OCP fault when the
counter reaches eight. The fastest OCP response for
overcurrent levels that are no more than 2.5x the OCP
threshold is 120µs, which is eight counts at 15µs each. The
ISL6263B protects against hard shorts by latching an OCP
fault within 2µs for overcurrent levels exceeding 2.5x the
OCP threshold. The value of ROCSET is calculated in
Equation 2:
ROCSET
=
-I-O-----C-----⋅---R-----d---r--o----o---p-
10.1 μ A
(EQ. 2)
For example: The desired overcurrent trip level, Ioc, is 30A,
Rdroop load-line is 8mΩ, Equation 2 gives ROCSET = 24kΩ.
Undervoltage protection is independent of the overcurrent
protection. If the output voltage measured on the VO pin is
less than +300mV below the voltage on the SOFT pin for
longer than 1ms, the controller will latch a UVP fault. If the
output voltage measured on the VO pin is greater than
195mV above the voltage on the SOFT pin for longer than
1ms, the controller will latch an OVP fault. Keep in mind that
VSOFT will equal the voltage level commanded by the VID
states only after the soft-start capacitor CSOFT has slewed to
the VID DAC output voltage. The UVP and OVP detection
circuits act on static and dynamic VSOFT voltage.
When an OCP, OVP, or UVP fault has been latched, PGOOD
becomes a low impedance and the gate driver outputs
UGATE and LGATE are pulled low. The energy stored in the
inductor is dissipated as current flows through the low-side
MOSFET body diode. The controller will remain latched in
the fault state until the VR_ON pin has been pulled below the
falling VR_ON threshold voltage VVR_ONL or until VDD has
gone below the falling POR threshold voltage VVDD_THF.
A severe-overvoltage protection fault occurs immediately
after the voltage between the VO and VSS pins exceed the
rising severe-overvoltage threshold VOVPS which is 1.545V,
the same reference voltage used by the VID DAC. The
11
FN6388.3
July 8, 2010