ISL54227_10 Datasheet, PDF (11/18 Pages) Intersil Corporation – High-Speed USB 2.0 (480Mbps) DPST Switch with Overvoltage Protection (OVP) and Dedicated Charger Port Detection

ISL54227
The OE and LP pins are internally pulled low through a
4MΩ resistor to ground and can be tri-stated or left
floating.
The ISL54227 is designed to minimize I_DD current
consumption when the logic control voltage is lower than
the V_DD supply voltage. With V_DD = 3.6V and the OE
logic pin is at 1.4V the part typically draws only 25µA.
With V_DD = 4.3V and the OE logic pin is at 2.6V the part
typically draws only 35µA. Driving the logic pin to the
V_DD supply rail minimizes power consumption.
The OE and LP pin can be driven with a voltage higher
than the V_DD supply voltage. It can be driven up to
5.25V with a V_DD supply in the range of 2.7V to 5.25V.
TABLE 2. LOGIC CONTROL VOLTAGE LEVELS
V_DD SUPPLY ^{LOGIC = “0” (LOW)}
RANGE
OE
LP
LOGIC = “1”
(HIGH)
OE
LP
2.7V to 3.6V
≤ 0.5V
or
floating
≤ 0.5V
or
floating
≥1.4V
≥1.4V
3.7V to 4.2V
≤ 0.7V
or
floating
≤ 0.7V
or
floating
≥1.7V
≥1.7V
4.3V to 5.25V
≤ 0.8V
or
floating
≤ 0.8V
or
floating
≥2.0V
≥2.0V
Low Power Mode
If the OE pin = Logic “0”, and the LP pin = Logic “1” the
switches will turn OFF (high impedance) and the part
will be put in a low power mode. In this mode the part
draws only 10µA (max) of current across the operating
temperature range.
Normal Operation Mode
With a signal level in the range of 0V to 3.6V and with
the LP pin = Logic “0” the switches will be ON when the
OE pin = Logic “1” and will be OFF (high impedance)
when the OE pin = Logic “0”.
USB 2.0 V_BUS Short Requirments
The USB specification in section 7.1.1 states a USB
device must be able to withstand a V_BUS short (4.4V to
5.25V) or a -1V short to the D+ or D- signal lines when
the device is either powered off or powered on for at
least 24 hours.
The ISL54227 part has special power-off protection and
OVP detection circuitry to meet these short circuit
requirements. This circuitry allows the ISL54227 to
provide protection to the USB down-stream transceiver
connected at its signal pins (D-, D+) to meet the USB
specification short circuit requirements.
The power-off protection and OVP circuitry allows the
COM pins (COM-, COM+) to be driven up to 5.25V or
down to -5V while the V_DD supply voltage is in the range
of 0V to 5.25V. In these overvoltage conditions with a
500Ω external V_DD resistor the part draws <55µA of
current into the COM pins and causes no stress/damage
to the IC. In addition all switches are OFF and the
shorted V_BUS voltage will be isolated from getting
through to the other side of the switch channels, thereby
protecting the USB transceiver.
Typical Performance Curves T_A = +25°C, Unless Otherwise Specified
3.4
16
I_COM = 17mA
3.3
2.7V
I_COM = 17mA
14
12
3.2
3.0V
3.3V
3.1
3.6V
4.3V
3.0
5.25V
2.9
0
0.1
0.2
0.3
0.4
V_COM (V)
FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
10
2.7V
8
3.0V
6
4
2
5.25V
3.3V
0
0
0.6
1.2
1.8
2.4
3.0
3.6
V_COM (V)
FIGURE 10. ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
11
FN7593.0
July 2, 2010