English
Language : 

ISL28130_11 Datasheet, PDF (11/19 Pages) Intersil Corporation – Single, Dual, and Quad Micropower, Low Drift, RRIO Operational Amplifiers
ISL28130, ISL28230, ISL28430
Applications Information
Functional Description
The ISL28130, ISL28230 and ISL28430 are low offset, low drift
operational amplifiers with a very high open loop gain (150dB)
and rail-to-rail input/output. The ISL28130, ISL28230 and
ISL28430 operate on a single supply range of 1.8V to 5.5V or a
dual supply range of ±0.9V to ±2.75V while consuming only
20µA of supply current per channel. The ISL28130, ISL28230
and ISL28430 have a 400kHz gain-bandwidth.
The high open loop gain, low offset voltage, high bandwidth and
low 1/f noise make the ISL28130, ISL28230 and ISL28430
ideal for precision applications.
Rail-to-rail Input and Output (RRIO)
The RRIO CMOS amplifier uses parallel input PMOS and NMOS
that enable the inputs to swing 100mV beyond either supply rail.
The inverting and non-inverting inputs do not have back-to-back
input clamp diodes and are capable of maintaining high input
impedance at high differential input voltages. This is effective in
eliminating output distortion caused by high slew rate input
signals.
The output stage uses common source connected PMOS and
NMOS devices to achieve rail-to-rail output drive capability with
15mA current limit and the capability to swing to within 50mV of
either rail while driving a 10kΩ load.
IN+ and IN- Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. For applications in which
either input is expected to exceed the rails by 0.5V, an external
series resistor must be used to ensure the input currents never
exceed 20mA (see Figure 23).
-
RIN
VIN
+
RL
VOUT
FIGURE 23. INPUT CURRENT LIMITING
Layout Guidelines for High Impedance Inputs
To achieve maximum performance from the high input impedance
and low offset voltage of the ISL28130, ISL28230 and ISL28430
amplifiers, care should be taken in the circuit board layout. The PC
board surface must remain clean and free of moisture to avoid
leakage currents between adjacent traces. Surface coating of the
circuit board reduces surface moisture and provides a humidity
barrier, reducing parasitic resistance on the board.
High Gain, Precision DC-Coupled Amplifier
The circuit in Figure 24 implements a single-stage DC-coupled
amplifier with an input DC sensitivity of under 100nV that is only
possible using a low VOS amplifier with high open loop gain. High
gain DC amplifiers operating from low voltage supplies are not
practical using typical low offset precision op amps. For example,
consider a typical precision amplifier in a gain of 10kV/V. A low
offset op amp with ±100µV VOS and 0.5µV/°C offset drift yields
a DC error of >1V, with an additional 5mV/°C of
temperature-dependent error. This amount of error makes it
difficult to resolve DC input voltage changes in the mV range.
The ±40µV max VOS and 150nV/°C temperature drift of the
ISL28130, ISL28230, and ISL28430 produce a
temperature-stable maximum DC output error of only ±400mV,
with a maximum output temperature drift of 1.5mV/°C. The
additional benefit of a very low 1/f noise corner frequency and
some feedback filtering allows DC voltages and voltage
fluctuations well below 10µV to be easily detected with a simple,
single-stage amplifier.
CF
0.018µF
1MΩ
VIN
100Ω
1MΩ
+2.5V
-
+
RL
100Ω
-2.5V
VOUT
ACL = 10kV/V
FIGURE 24. HIGH GAIN, PRECISION DC-COUPLED AMPLIFIER
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
FN7623.3
July 15, 2011