82C55A Datasheet, PDF (11/26 Pages) Intel Corporation – CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

CONTROL WORD
D7 D6 D5 D4 D3 D2 D1 D0
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1/0 1/0 1/0
82C55A
PC2-PC0
1 = INPUT
0 = OUTPUT
PORT B
1 = INPUT
0 = OUTPUT
WR
GROUP B MODE
0 = MODE 0
1 = MODE 1
RD
FIGURE 11. MODE CONTROL WORD
PC3
INTRA
PA7-PA0 8
PC7
INTE
1
PC6
OBFA
ACKA
INTE
2
PC4
PC5
STBA
IBFA
PC2-PC0 ³ _I/O
FIGURE 12. MODE 2
DATA FROM
CPU TO 82C55A
WR
OBF
INTR
ACK
STB
tWOB
tST
tAOB
tAK
IBF
PERIPHERAL
BUS
tSIB
tPS
tPH
tAD
tKD
tRIB
RD
DATA FROM
DATA FROM
PERIPHERAL TO 82C55A
82C55A TO PERIPHERAL
DATA FROM
82C55A TO CPU
NOTE: Any sequence where WR occurs before ACK and STB occurs before RD is permissible. (INTR = IBF • MASK • STB • RD ÷ OBF •
MASK • ACK • WR)
FIGURE 13. MODE 2 (BI-DIRECTIONAL)
11