X9260_06 Datasheet, PDF (10/23 Pages) Intersil Corporation – Dual Digitally-Controlled Potentiometers

X9260
Figure 5. Three-Byte Instruction Sequence (Read Status Register)
CS
SCL
SI
0 1 0 1 00
1011
0
ID3 ID2 ID1 ID0 0 0 A1 A0
I3 I2 I1 I0 RB RA
P0
0000
000
WIP
Device ID
Internal
Address
Instruction
Opcode
Register Pot/WCR
Address Address
Status
Bit
Figure 6. Increment/Decrement Instruction Sequence
CS
SCL
SI
0 1 0 1 00
0
ID3 ID2 ID1 ID0 0 0 _{A1 A0}
I2 I3 I1 I0 RB RA
P0
II
ID
D
Device ID
Internal
Address
Instruction
Opcode
Register Pot/WCR
Address Address
NN
CC
12
N
C
E
C
n1
E
C
n
Figure 7. Increment/Decrement Timing Limits
SCK
SI
RW
VOLTAGE OUT
INC/DEC CMD ISSUED
tWRID
10
FN8170.3
August 29, 2006