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ISL6269AIRZ-T Datasheet, PDF (10/14 Pages) Intersil Corporation – High-Performance Notebook PWM Controller
ISL6269A
Programming the Output Voltage
When the converter is in regulation there will be 600mV from
the FB pin to the GND pin. Connect a two-resistor voltage
divider across the VO pin and the GND pin with the output
node connected to the FB pin. Scale the voltage-divider
network such that the FB pin is 600mV with respect to the
GND pin when the converter is regulating at the desired
output voltage. The output voltage can be programmed from
600mV to 3.3V.
Programming the output voltage is written as:
VREF
=
VO
U
T
•
------------R----B----O-----T---T----O----M---------------
RTOP + RBOTTOM
(EQ. 5)
Where:
- VOUT is the desired output voltage of the converter
- VREF is the voltage that the converter regulates to
between the FB pin and the GND pin
- RTOP is the voltage-programming resistor that connects
from the FB pin to the VO pin. In addition to setting the
output voltage, this resistor is part of the loop
compensation network
- RBOTTOM is the voltage-programming resistor that
connects from the FB pin to the GND pin
Beginning with RTOP between 1kΩ to 5kΩ, calculating
RBOTTOM is written as:
RBOTTOM
=
--V----R----E----F----•---R----T----O-----P---
VOUT – VREF
(EQ. 6)
Programming the PWM Switching Frequency
The ISL6269A does not use a clock signal to produce PWM.
The PWM switching frequency fSW is programmed by the
resistor RFSET that is connected from the FSET pin to the
GND pin. The approximate PWM switching frequency is
written as:
fSW = K------⋅---R----1-F---S----E----T--
(EQ. 7)
Estimating the value of RFSET is written as:
RFSET
=
--------1---------
K • fSW
(EQ. 8)
Where:
- fSW is the PWM switching frequency
- RFSET is the fSW programming resistor
- K = 75 x 10-12
It is recommended that whenever the control loop
compensation network is modified, fSW should be checked
for the correct frequency and if necessary, adjust RFSET.
Compensation Design
The LC output filter has a double pole at its resonant frequency
that causes the phase to abruptly roll downward. The R3
modulator used in the ISL6269A makes the LC output filter
resemble a first order system in which the closed loop stability
can be achieved with a Type II compensation network.
R2
C1
C2
COMP
- FB
EA
+
REF
FSET
R3 MODULATOR
VO
VIN
R1
RFSET
CFSET
VOUT
VIN
UG
PHASE
GATE DRIVERS
LG
GND
ISL6269A
QHIGH_SIDE
LOUT
DCR
QLOW_SIDE
COUT
CESR
FIGURE 6. COMPENSATION REFERENCE CIRCUIT
Your local Intersil representative can provide a PC-based
tool that can be used to calculate compensation network
component values and help simulate the loop frequency
response. The compensation network consists of the internal
error amplifier of the ISL6269A and the external components
R1, R2, C1, and C2 as well as the frequency setting
components RFSET, and CFSET, are identified in the
schematic Figure 6.
General Application Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a single-phase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
10
FN9253.2
May 30, 2007