ISL54226_10 Datasheet, PDF (10/18 Pages) Intersil Corporation – High-Speed USB 2.0 (480Mbps) DPST Switch with Overvoltage Protection (OVP) and Dedicated Charger Port Detection

ISL54226
External V_DD Series Resistor to Limit I_DD
Current during Negative OVP Condition
A 100Ω to 1kΩ resistor in series with the VDD pin
(see Figure 6) is required to limit the I_DD current draw
from the system power supply rail during a negative OVP
fault event.
With a negative -5V fault voltage at both com pins, the
graph in Figure 7 shows the I_DD current draw for
different external resistor values for supply voltages of
2.7V, 3.6V, and 5.25V. Note: With a 500Ω resistor the
current draw is limited to around 5mA. When the
negative fault voltage is removed the I_DD current will
return to it’s normal operation current of 25µA to 45µA.
The series resistor also provides improved ESD and
latch-up immunity. During an overvoltage transient event
(such as occurs during system level IEC 61000 ESD
testing), substrate currents can be generated in the IC
that can trigger parasitic SCR structures to turn ON,
creating a low impedance path from the V_DD power
supply to ground. This will result in a significant amount
of current flow in the IC, which can potentially create a
latch-up state or permanently damage the IC. The
external V_DD resistor limits the current during this
overstress situation and has been found to prevent
latch-up or destructive damage for many overvoltage
transient events.
Under normal operation the low microamp I_DD current of
the IC produces an insignificant voltage drop across the
series resistor resulting in no impact to switch operation
or performance.
V_SUPPLY
-5V
FAULT
VOLTAGE
PROTECTION
RESISTOR
100Ω TO 1kΩ
C
I_DD
COM+
V_DD
D+
OVP
COM-
D-
LOGIC
OE/ALM
GND INT
100kΩ
LOW
TO
INDICATE
OVP
FIGURE 6. V_DD SERIES RESISTOR TO LIMIT I_DD
CURRENT DURING NEGATIVE OVP AND FOR
ENHANCED ESD AND LATCH-UP IMMUNITY
25
20
5.25V
15
V_COM+ = V_COM- = -5V
10
3.6V
5 2.7V
0
100 200 300 400 500 600 700 800 900 1k
RESISTOR (Ω)
FIGURE 7. NEGATIVE OVP I_DD CURRENT vs RESISTOR
VALUE vs V_SUPPLY
V_SUPPLY
POWER
MANAGEMENT
BATTERY CHARGER
CIRCUITRY
V_BUS
C
BATTERY
CHARGER
200Ω
D+ _COM+ ^VDD
D+
CHG DET
D-
COM-
LOGIC
D-
OE/ALM
GND
GND INT
“LOW” TO
INDICATE
CHARGER
CONNECTED
USB
TRANCEIVER
µP
DRIVEN LOW BY µP
(OE/ALM = “0”)
FIGURE 8. CHARGER PORT DETECTION
CHARGER PORT DETECTION
The ISL54226 has special charger port detection circuitry
that monitors the voltage at the com pins to detect when
a battery charger has been connected into the USB port
(see Figure 8).
When the battery charger is connected to the USB
connector it shorts the COM+ and COM- pins together.
The shorting of the pins is sensed by the ISL54226 IC
and it pulls the COM+ and COM- lines high and as long as
the OE/ALM pin is driven low (OE/ALM = “0”) by the µP, it
will drive its INT logic output “Low” to tell the power
management circuitry that a battery charger is
connected at the port and not a USB host transceiver.
The power management circuitry will then set the
appropriate current level and use the USB connector
VBUS line to charge the battery.
10
FN7614.0
July 29, 2010