ISL32173E Datasheet, PDF (10/22 Pages) Intersil Corporation – QUAD, ±16.5kV ESD Protected, 3.0V to 5.5V, RS-485/RS-422 Receivers

ISL32173E, ISL32175E, ISL32177E, ISL32273E, ISL32275E, ISL32277E
Electrical Specifications
Test Conditions: V_CC = 3.0V to 5.5V; V_L = V_CC (ISL32177E and ISL32277E only); Typicals are at
the worst case of V_CC = 3.3V or V_CC = 5V, T_A = +25°C; Unless Otherwise Specified. Boldface
limits apply over the operating temperature range. (Notes 10, 14) (Continued)
PARAMETER SYMBOL
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Note 13) TYP (Note 13) UNITS
Receiver Input to t_PLH, t_PHL (Figure 1)
Output Delay
Full
7
11
16
ns
Receiver Skew
| t_PLH - t_PHL |
Prop Delay Skew
Chan-to-Chan
t_SKD (Figure 1)
t_SKC-C (Figure 1), (Note 11)
Full
-
0.4
2
ns
Full
-
0.7
4
ns
Prop Delay Skew
Part-to-Part
t_SKP-P (Figure 1), (Note 12)
Full
-
1.2
8
ns
Receiver Enable to
t_ZH
R_L = 1kΩ, C_L = 15pF, SW = GND (Figure 2), Full
-
Output High
(Notes 15, 21)
57
75
ns
Receiver Enable to
t_ZL
R_L = 1kΩ, C_L = 15pF, SW = V_CC (Figure 2), Full
-
Output Low
(Notes 15, 21)
59
75
ns
Receiver Disable
t_HZ
R_L = 1kΩ, C_L = 15pF, SW = GND (Figure 2) Full
-
from Output High
18
30
ns
Receiver Disable
t_LZ
R_L = 1kΩ, C_L = 15pF, SW = V_CC (Figure 2) Full
-
from Output Low
19
30
ns
Receiver Enable t_ZH(SHDN) R_L = 1kΩ, C_L = 15pF, SW = GND (Figure 2), Full
-
from Shutdown to
(Notes 16, 20)
Output High
-
850
ns
Receiver Enable t_ZL(SHDN) R_L = 1kΩ, C_L = 15pF, SW = V_CC (Figure 2), Full
-
from Shutdown to
(Notes 16, 20)
Output Low
-
850
ns
NOTES:
10. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device
ground unless otherwise specified.
11. Channel-to-channel skew is the magnitude of the worst case delta between any two propagation delays of any two outputs
on the same IC, at the same test conditions.
12. t_SKP-P is the magnitude of the difference in propagation delays of the specified terminals of two units tested with identical test
conditions (V_CC, temperature, etc.).
13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
14. EN = 0 indicates that the output(s) under test are disabled via the appropriate logic pin settings. EN = 1 indicates that the
logic pins are set to enable the output(s) under test.
15. For ISL32177E and ISL32277E, keep SHDNEN low to avoid entering SHDN. For ISL32175E and ISL32275E ensure that at least
one channel remains enabled to prevent SHDN.
16. For ISL32177E and ISL32277E, keep SHDNEN high to enter SHDN when all drivers are disabled.
17. Logic Pins are the enable variants and SHDNEN.
18. EN low and EN high on the ISL32X73E. SHDNEN, EN, EN1-EN4 all high and EN low on the ISL32X77E.
19. EN12 and EN34 low on ISL32X75E. SHDNEN high, with EN1-EN4 low plus EN and EN high on the ISL32X77E.
20. Shutdown is entered by simultaneously disabling all four outputs for at least 600ns.
21. Does not apply to the ISL32173E nor the ISL32273E; only the EN from SHDN parameters apply to these two parts.
10
FN7529.0
November 19, 2009