ISL1219 Datasheet, PDF (10/24 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM and Event Detection

ISL1219
Event Detect Timing Diagram With
Sampling Mode Enabled
Case 1, Switched Opened Before I_pu
ON
I_pu
OFF
15 CLKS (8x)
EXT. ^OPEN
SWITCH
CLOSED
HIGH
EV_IN
LOW
HIGH
EVDET
LOW
8 CLKS (8x)
Case 2, Switched Opened After I_pu
ON
I_pu
OFF
15 CLKS (8x)
EXT. ^OPEN
SWITCH
CLOSED
HIGH
EV_IN
LOW
HIGH
EVDET
LOW
8 CLKS (8x)
Case 3, Switched Bounced
ON
I_pu
OFF
EXT. ^OPEN
SWITCH
CLOSED
15 CLKS (8x)
HIGH
EV_IN
LOW
HIGH
EVDET
LOW
8 CLKS (8x)
The ISL1219 can operate independently or in conjunction
with a microcontroller for low power operation modes or in
battery backup modes.
The event detection and time stamp circuits operate in either
main V_DD power or battery backup mode.
Users have the option to connect EVIN (see EVINEB bit) to
an internal pull-up current source that operates at 1µA
(always on mode), which can drop to 400nA in battery
backup mode. User selectable event sampling modes are
also available which will effectively reduce power
consumption with 1/4-Hz, 1-Hz and 2-Hz sample detection
rates. The EVIN input is pulsed ON/OFF when in sampling
mode for power savings advantages ( Tables 1, 2, 3, and 4).
The EVIN also has a user selectable time based hysteresis
filter (see EHYS bits) to implement switch de-bouncing
during an event detection. The EVIN signal must be high for
the duration of the selected time period. The time periods
available are 0 times delay (no time based hysteresis) to
3.9ms, 15.625ms or 31.25ms (see Table 1, 2, 3, and 4).
TABLE 1. ΔI_DD (V_DD = 3V, t_HYS = 3.9ms)
f_SMP
1/4Hz
DELTA I_DD
20.5nA
1Hz
82nA
2Hz
164nA
TABLE 2. ΔI_DD (V_DD = 5.0V, t_HYS = 3.9ms)
f_SMP
1/4Hz
DELTA I_DD
65.8nA
1Hz
263.3nA
2Hz
526.5nA
TABLE 3. ΔI_DD (V_DD = 3.0V, t_HYS = 15.625ms)
f_SMP
1/4Hz
DELTA I_DD
82nA
1Hz
328nA
2Hz
656.3nA
TABLE 4. ΔI_DD (V_DD = 5.0V, t_HYS = 15.625ms)
f_SMP
1/4Hz
DELTA I_DD
264nA
1Hz
1.05µA
2Hz
2.1µA
Real Time Clock Operation
The Real Time Clock (RTC) uses an external 32.768kHz
quartz crystal to maintain an accurate internal representation
of second, minute, hour, day of week, date, month, and year.
The RTC also has leap-year correction. The clock also
corrects for months having fewer than 31 days and has a bit
that controls 24 hour or AM/PM format. When the ISL1219
powers up after the loss of both V_DD and V_BAT, the clock will
not begin incrementing until at least one byte is written to the
clock register.
10
FN6314.2
July 15, 2010