HSP50216_15 Datasheet, PDF (10/59 Pages) Intersil Corporation – Four-Channel Programmable Digital Downconverter

HSP50216
CIC Filter
Next, the signal is filtered by a cascaded integrator/comb
(CIC) filter. A CIC filter is an efficient architecture for
decimation filtering. The power or magnitude squared
frequency response of the CIC filter is given by:

 ^2N
P(f)
=




-^s--_s-ⁱ-ⁿ-_i--_n-⁽---_^π--_π--R-^M-----_f--_-^f--⁾_{}
where
M = Number of delays (1 for the HSP50216)
N = Number of stages
and R = Decimation factor.
The passband frequency response for 1^st (N = 1) though 5^th
(N=5) order CIC filters is plotted in Figure 8. The frequency
axis is normalized to f_S/R, making f_S/R = 1 the CIC output
sample rate. Figure 10 shows the frequency response for a
5^th order filter but extends the frequency axis to f_S/R = 3 (3
times the CIC output sample rate) to show alias rejection for
the out of band signals. Figure 9 uses information from
Figure 10 to provide the amplitude of the first (strongest)
alias as a function of the signal frequency or bandwidth from
DC. For example, with a 5^th order CIC and f_S/R = 0.125
(signal frequency is 1/8 the CIC output rate) Figure 9 shows
a first alias level of about -87dB. Figure 9 is also listed in
table form in Table 47.
The CIC filter order is programmable from 0 to 5. The
minimum decimation is 4. If the order is set to 0, there must
be at least 4 clocks between samples or the decimation
counter must be set to 4 to chose every 4th sample.
The integrator bit widths are 69, 62, 53, 44, and 34 for the 1^st
through 5^th stages, respectively, while the comb bit widths
are all 32. The integrators are sized for decimation factors of
up to 512 with 5 stages, 2048 with 4 stages, 32768 with 3
stages, and 65536 with 1 or 2 stages. Higher decimations in
the CIC should be avoided as they will cause integrator
overflow. In the HSP50216, the integrators are slightly
oversized to reduce the quantization noise at each stage.
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FN4557.8
October 5, 2015