KAD5512P Datasheet, PDF (1/36 Pages) List of Unclassifed Manufacturers – Low Power 12-Bit, 250/210/170/125MSPS ADC

Low Power 12-Bit, 250/210/170/125MSPS ADC
KAD5512P
The KAD5512P is the low-power member of the
KAD5512 family of 12-bit analog-to-digital converters.
Designed with Intersil’s proprietary FemtoCharge™
technology on a standard CMOS process, the family
supports sampling rates of up to 250MSPS. The
KAD5512P is part of a pin-compatible portfolio of 10, 12
and 14-bit A/Ds with sample rates ranging from
125MSPS to 500MSPS.
A serial peripheral interface (SPI) port allows for
extensive configurability, as well as fine control of various
parameters such as gain and offset.
Digital output data is presented in selectable LVDS or CMOS
formats. The KAD5512P is available in 72- and 48-contact
QFN packages with an exposed paddle. Operating from a
1.8V supply, performance is specified over the full industrial
temperature range (-40°C to +85°C).
Key Specifications
• SNR = 66.1dBFS for f_IN = 105MHz (-1dBFS)
• SFDR = 87dBc for f_IN = 105MHz (-1dBFS)
• Total Power Consumption
- 267/219mW @ 250/125MSPS (SDR Mode)
- 234/189mW @ 250/125MSPS (DDR Mode)
Related Literature*(see page 34)
• See FN6805, KAD5512P-50, “12-Bit, 500MSPS A/D
Converter”
• See FN6808, KAD5512HP, “High Performance 12-Bit,
250/210/170/125MSPS ADC”
Features
• Half the Power of the Pin-Compatible KAD5512HP
Family
• 1.5GHz Analog Input Bandwidth
• 60fs Clock Jitter
• Programmable Gain, Offset and Skew Control
• Over-Range Indicator
• Selectable Clock Divider: ÷1, ÷2 or ÷4
• Clock Phase Selection
• Nap and Sleep Modes
• Two’s Complement, Gray Code or Binary Data Format
• SDR/DDR LVDS-Compatible or LVCMOS Outputs
• Programmable Built-in Test Patterns
• Single-Supply 1.8V Operation
• Pb-Free (RoHS Compliant)
Applications*(see page 34)
• Power Amplifier Linearization
• Radar and Satellite Antenna Array Processing
• Broadband Communications
• High-Performance Data Acquisition
• Communications Test Equipment
• WiMAX and Microwave Receivers
CLKP
CLKN
VINP
VINN
VCM
CLOCK
GENERATION
CLKOUTP
CLKOUTN
SHA
1.25V
+
–
12-BIT
250 MSPS
ADC
SPI
CONTROL
DIGITAL
ERROR
CORRECTION
LVDS/CMOS
DRIVERS
D[11:0]P
D[11:0]N
ORP
ORN
OUTFMT
OUTMODE
0
AIN = -1.0dBFS
SNR = 66.0dBFS
-20 SFDR = 86.5dBc
SINAD = 65.9dBFS
-40
-60
-80
-100
-120
0
20
40
60
80
100 120
FREQUENCY (MHz)
SINGLE-TONE SPECTRUM @ 105MHz (250MSPS)
October 1, 2010
FN6807.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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FemtoCharge is a trademark of Kenet Inc. Copyright Intersil Americas Inc. 2008-2010. All Rights Reserved
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