ISLA110P50_11 Datasheet, PDF (1/34 Pages) Intersil Corporation – 10-Bit, 500MSPS A/D Converter

10-Bit, 500MSPS A/D Converter
ISLA110P50
The ISLA110P50 is a low-power, high-performance, 500MSPS
analog-to-digital converter designed with Intersil’s proprietary
FemtoCharge™ technology on a standard CMOS process. The
ISLA110P50 is part of a pin-compatible portfolio of 8, 10 and
12-bit A/Ds. This device is an upgrade of the KAD551XP-50
product family and is pin similar.
The device utilizes two time-interleaved 250MSPS unit A/Ds to
achieve the ultimate sample rate of 500MSPS. A single 500MHz
conversion clock is presented to the converter, and all interleave
clocking is managed internally. The proprietary Intersil Interleave
Engine (I2E) performs automatic fine correction of offset, gain,
and sample time skew mismatches between the unit A/Ds to
optimize performance. No external interleaving algorithm is
required.
A serial peripheral interface (SPI) port allows for extensive
configurability of the A/D. The SPI also controls the interleave
correction circuitry, allowing the system to issue continuous
calibration commands as well as configure many dynamic
parameters.
Digital output data is presented in selectable LVDS or CMOS
formats. The ISLA110P50 is available in a 72 Ld QFN package
with an exposed paddle. Performance is specified over the full
industrial temperature range (-40°C to +85°C).
Features
• 1.15GHz Analog Input Bandwidth
• 90fs Clock Jitter
• Automatic Fine Interleave Correction Calibration
• Multiple Chip Time Alignment Support via the Synchronous
Clock Divider Reset
• Programmable Gain, Offset and Skew Control
• Over-Range Indicator
• Clock Phase Selection
• Nap and Sleep Modes
• Two’s Complement, Gray Code or Binary Data Format
• DDR LVDS-Compatible or LVCMOS Outputs
• Programmable Test Patterns and Internal Temperature Sensor
Applications
• Radar and Electronic/Signal Intelligence
• Broadband Communications
• High-Performance Data Acquisition
CLKP
CLKN
VINP
VINN
VCM
Pin-Compatible Family
CLOCK
MANAGEMENT
CLKOUTP
CLKOUTN
MODEL
ISLA112P50
ISLA110P50
ISLA118P50
RESOLUTION
12
10
8
SHA
10- BIT
250 MSPS
ADC
Key Specifications
D[9:0]P
D[9:0]N
• SNR = 60.6dBFS for f_IN = 190MHz (-1dBFS)
VREF
Gain/ Offset/Skew
Adjustments
DIGITAL
I2E
ERROR
CORRECTION
ORP
ORN
OUTFMT
• SFDR = 80dBc for f_IN = 190MHz (-1dBFS)
• Total Power Consumption = 441mW
SHA
10 - BIT
250 MSPS
ADC
VREF
1. 25V
+
–
SPI
CONTROL
OUTMODE
SPEED
(MSPS)
500
500
500
FIGURE 1. BLOCK DIAGRAM
July 25, 2011
FN7606.2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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