ISL6537 Datasheet, PDF (1/15 Pages) Intersil Corporation – ACPI Regulator/Controller for Dual Channel DDR Memory Systems

®
Data Sheet
July 18, 2007
ISL6537
FN9142.6
ACPI Regulator/Controller for
Dual Channel DDR Memory Systems
The ISL6537 provides a complete ACPI compliant power
solution for up to 4 DIMM dual channel DDR/DDR2 Memory
systems. Included are both a synchronous buck controller to
supply V_DDQ during S0/S1 and S3 states. During S0/S1
state, a fully integrated sink-source regulator generates an
accurate (V_DDQ/2) high current V_TT voltage without the
need for a negative supply. A buffered version of the V_DDQ/2
reference is provided as V_REF. Two LDO controllers are also
integrated for the GMCH core voltage regulation and for the
GMCH and CPU V_TT termination voltage regulation.
The switching PWM controller drives two N-Channel
MOSFETs in a synchronous-rectified buck converter
topology. The synchronous buck converter uses voltage-
mode control with fast transient response. The switching
regulator provides a maximum static regulation tolerance of
±2% over line, load, and temperature ranges. The output is
user-adjustable by means of external resistors down to 0.8V.
An integrated soft-start feature brings all outputs into
regulation in a controlled manner when returning to S0/S1
state from any sleep state. During S0 the VIDPGD signal
indicates that the GMCH and CPU V_TT termination voltage
is within spec and operational.
Each output is monitored for undervoltage events. The
switching regulator also has overvoltage and overcurrent
protection. Thermal shutdown is integrated.
Pinout
ISL6537 (6x6 QFN)
TOP VIEW
28 27 26 25 24 23 22
5VSBY 1
21 DRIVE4
S3# 2
20 REFADJ4
P12V 3
GND 4
DDR_VTT 5
GND
29
19 DRIVE3
18 FB3
17 FB4
DDR_VTT 6
16 COMP
VDDQ 7
15 FB
8 9 10 11 12 13 14
Features
• Generates 4 Regulated Voltages
- Synchronous Buck PWM Controller for DDR V_DDQ
- 3A Integrated Sink/Source Linear Regulator with
Accurate VDDQ/2 Divider Reference for DDR V_TT
- LDO Regulator for GMCH Core
- LDO Regulator for CPU/GMCH V_TT Termination
• ACPI Compliant Sleep State Control
• Glitch-free Transitions During State Changes
• Integrated V_REF Buffer
• PWM Controller Drives Low Cost N-Channel MOSFETs
• 250kHz Constant Frequency Operation
• Tight Output Voltage Regulation
- All Outputs: ±2% Over Temperature
• Fully-Adjustable Outputs with Wide Voltage Range: Down
to 0.8V supports DDR and DDR2 Specifications
• Simple Single-Loop Voltage-Mode PWM Control Design
• Fast PWM Converter Transient Response
• Under and Overvoltage Monitoring on All Outputs
• OCP on the Switching Regulator
• Integrated Thermal Shutdown Protection
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• _{Single and Dual Channel DDR Memory Power Systems in}
ACPI Compliant PCs
• _{Graphics Cards - GPU and Memory Supplies}
• ASIC Power Supplies
• Embedded Processor and I/O Supplies
• DSP Supplies
Ordering Information
PART
PART
TEMP.
PKG.
NUMBER MARKING RANGE (°C) PACKAGE DWG. #
ISL6537CR ISL6537CR 0 to +70 28 Ld 6x6 QFN L28.6x6
ISL6537CRZ ISL6537CRZ 0 to +70 28 Ld 6x6 QFN L28.6x6
(See Note)
(Pb-free)
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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