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ISL22346_14 Datasheet, PDF (1/16 Pages) Intersil Corporation – Low Noise, Low Power I2C™ Bus,128 Taps
ISL22346
®
Quad Digitally Controlled Potentiometers (XDCP™)
Data Sheet
September 3, 2009
FN6177.2
Low Noise, Low Power I2C™ Bus,
128 Taps
The ISL22346 integrates four digitally controlled potentiometers
(DCP) and non-volatile memory on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. Each potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up the device recalls the contents of the two
DCP’s IVR to the corresponding WRs.
The DCPs can be used as a three-terminal potentiometers
or as a two-terminal variable resistors in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Pinouts
ISL22346
(20 LD TSSOP)
TOP VIEW
RH3 1
RL3 2
RW3 3
A2 4
SCL 5
SDA 6
GND 7
RW2 8
RL2 9
RH2 10
20 RW0
19 RL0
18 RH0
17 SHDN
16 VCC
15 A1
14 A0
13 RH1
12 RL1
11 RW1
Features
• Four potentiometers in one package
• 128 resistor taps
• I2C serial interface
- Three address pins, up to eight devices/bus
• Non-volatile storage of wiper position
• Wiper resistance: 70Ω typical @ VCC = 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kΩ or 10kΩ total resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T < +55°C
• 20 Ld TSSOP or 20 Ld TQFN package
• Pb-free (RoHS compliant)
ISL22346
(20 LD TQFN)
TOP VIEW
O 20 19 18 17 16
RL0 1
RW0 2
RH3 3
RL3 4
RW3 5
15 RH1
14 RL1
13 RW1
12 RH2
11 RL2
6 7 8 9 10
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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