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HSP50016_14 Datasheet, PDF (1/30 Pages) Intersil Corporation – Digital Down Converter | |||
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TM
Data Sheet
HSP50016
September 2000 File Number 3288.7
Digital Down Converter
The Digital Down Converter (DDC) is a single chip
synthesizer, quadrature mixer and lowpass ï¬lter. Its input
data is a sampled data stream of up to 16 bits in width and
up to a 75 MSPS data rate. The DDC performs down
conversion, narrowband low pass ï¬ltering and decimation to
produce a baseband signal.
The internal synthesizer can produce a variety of signal
formats. They are: CW, frequency hopped, linear FM up
chirp, and linear FM down chirp. The complex result of the
modulation process is lowpass ï¬ltered and decimated with
identical real ï¬lters in the in-phase (I) and quadrature (Q)
processing chains.
Lowpass ï¬ltering is accomplished via a High Decimation
Filter (HDF) followed by a ï¬xed Finite Impulse Response
(FIR) ï¬lter. The combined response of the two stage ï¬lter
results in a -3dB to -102dB shape factor of better than 1.5.
The stopband attenuation is greater than 106dB. The
composite passband ripple is less than 0.04dB. The
synthesizer and mixer can be bypassed so that the chip
operates as a single narrow band low pass ï¬lter.
The chip receives forty bit serial commands as a control
input. This interface is compatible with the serial I/O port
available on most microprocessors.
The output data can be conï¬gured in ï¬xed point or single
precision ï¬oating point. The ï¬xed point formats are 16,
24, 32, or 38-bit, twoâs complement, signed magnitude, or
offset binary.
The circuit provides an IEEE 1149.1 Test Access Port.
Features
⢠75 MSPS Input Data Rate
⢠16-Bit Data Input; Offset Binary or 2âs Complement
Format
⢠Spurious Free Dynamic Range Through Modulator
>102dB
⢠Frequency Selectivity: <0.006Hz
⢠Identical Lowpass Filters for I and Q
⢠Passband Ripple: <0.04dB
⢠Stopband Attenuation: >104dB
⢠Filter -3dB to -102dB Shape Factor: <1.5
⢠Decimation Factors from 32 to 131,072
⢠IEEE 1149.1 Test Access Port
⢠HSP50016-EV Evaluation Board Available
Applications
⢠Cellular Base Stations
⢠Smart Antennas
⢠Channelized Receivers
⢠Spectrum Analysis
⢠Related Products: HI5703, HI5746, HI5766 A/Ds
Ordering Information
PART
NUMBER
HSP50016JC-52
HSP50016JC-75
TEMP. RANGE
(oC)
PACKAGE
0 to 70 44 Ld PLCC
0 to 70 44 Ld PLCC
PKG.
NO.
N44.65
N44.65
Block Diagram
16
DATA
CLK
CONTROL
TEST ACCESS
PORT/CTRL
COS
SIN
COMPLEX
SINUSOID
GENERATOR
TEST ACCESS
PORT
HIGH DECIMATION
FILTER
HIGH DECIMATION
FILTER
LOW PASS FIR
I
FILTER
Q
LOW PASS FIR
FILTER
CLK
CLK
R
CLK
4R
OR
CLK
2R
I
OUTPUT
Q
IQSTRB
IQCLK
CLKSER
3-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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