HIP7030A0 Datasheet, PDF (1/10 Pages) Intersil Corporation – J1850 8-Bit 68HC05 Microcontroller Emulator Version

HIP7030A0
PRELIMINARY
April 1994
J1850 8-Bit 68HC05 Microcontroller
Emulator Version
Features
Description
• HIP7030A2 Microcontroller Emulation
- All HIP7030A2 Hardware and Software Features
- Timing and Performance Equivalent to HIP7030A2
• On-Chip Memory
- 176 Bytes of RAM - No ROM
• Full 8K Byte Address Space Available Externally
• Non-Multiplexed External Address and Data Lines
- I/O Memory Interface Matches Industry Standard
EPROM/EEPROMS for True Emulation with Two
Chips
• FS Line Identifies Fetch Cycles for Breakpoint Logic
• -40^oC to +125^oC Operating Range
• Single 3.0V to 6.0V Supply
• Available in 68 Lead PLCC Packages
The HIP7030A0 Emulator is functionally equivalent to the
HIP7030A2 microcontroller with the addition of external data
bus, address bus, and control signals which provide off chip
address capability. It is designed to permit prototype and
pre-production development of systems for mask pro-
grammed applications. The HIP7030A0 is also intended for
construction of development systems for the HIP7030A2.
Ordering Information
PART NUMBER
HIP7030A0M
TEMPERATURE
RANGE
-40^oC to +125^oC
PACKAGE
68 Lead Plastic LCC
Pinout
HIP7030A0 (PLCC)
TOP VIEW
NC
NC
WE
DS
ALC
PD4
PD3
PD2
PD1
PD0
NC
NC
V_SS
OSCOUT
OSCIN
SCK
MOSI
9 8 7 6 5 4 3 2 1 6867666564636261
10
60
11
59
12
58
13
57
14
56
15
55
16
54
17
53
18
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
2728293031323334353637383940414243
A12
NC
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
OSCB
PA0
PA1
PA2
PA3
PA4
PA5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
407-727-9207 | Copyright © Intersil Corporation 1999
9-40
File Number 3645