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HIP2060 Datasheet, PDF (1/8 Pages) Intersil Corporation – 60V, 10A Half Bridge Power MOSFET Array | |||
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HIP2060
April 1998
60V, 10A Half Bridge Power MOSFET Array
Features
Description
⢠Two 10A Power MOS N-Channel Transistors
⢠Output Voltage to 60V
⢠rDS(ON) . . . . . 0.135⦠Max Per Transistor at VGS = 15V
⢠rDS(ON) . . . . . . 0.15⦠Max Per Transistor at VGS = 10V
⢠Pulsed Current . . . . . . . . . . . . . . . . 25A Each Transistor
⢠Avalanche Energy . . . . . . . . . . 100mJ Each Transistor
⢠Grounded Tab Eliminates Heat Sink Isolation
Ordering Information
The HIP2060 is a power half-bridge MOSFET array that con-
sists of two matched N-Channel enhancement-mode MOS
transistors. The advanced Intersil PASIC2 process technol-
ogy used in this product utilizes efï¬cient geometries that pro-
vides outstanding device performance and ruggedness.
The HIP2060 is designed to integrate two power devices in
one chip thus providing board layout area and heat sink sav-
ings for applications such as Motor Controls, Uninterruptable
Power Supplies, Switch Mode Power Supplies, Voice Coil
Motors, and Class D Power Ampliï¬er.
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
PKG.
NO.
HIP2060AS1
-40 to 125 5 Ld SIP
Z5.067C
HIP2060AS2
-40 to 125 5 Ld Gullwing SIP Z5.067A
HIP2060AS3
-40 to 125 5 Ld SIP
Z5.067B
NOTE: When ordering use the entire part number.
Symbol
DRAIN1 5
GATE1
Z1
1
GATE2
Z2
2
D1
SOURCE1 = DRAIN2
4
SOURCE2 3, TAB
Packages
JEDEC TS-001AA (ALTERNATE VERSION)
HIP2060 AS1
5432
1
(TAB)
Z5.067B (SIP)
HIP2060 AS3
JEDEC MO-169
HIP2060 AS2
1 GATE1
2 GATE2
3 SOURCE2
4 SOURCE1-DRAIN2
5 DRAIN1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
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File Number 3983.5
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