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HCTS273MS Datasheet, PDF (1/10 Pages) Intersil Corporation – Radiation Hardened Octal D Flip-Flop
HCTS273MS
September 1995
Radiation Hardened
Octal D Flip-Flop
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s. 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20, LEAD FINISH C
TOP VIEW
MR 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20, LEAD FINISH C
TOP VIEW
Description
MR
1
20
Q0
2
19
VCC
Q7
The Intersil HCTS273MS is a Radiation Hardened octal D flip-
D0
3
18
D7
flop, positive edge triggered, with reset.
D1
4
17
D6
Q1
5
16
Q6
The HCTS273MS utilizes advanced CMOS/SOS technology to
Q2
6
15
Q5
achieve high-speed operation. This device is a member of
D2
7
14
D5
radiation hardened, high-speed, CMOS/SOS Logic Family.
D3
8
13
D4
The HCTS273MS is supplied in a 20 lead Ceramic flatpack
Q3
9
12
Q4
(K suffix) or a SBDIP Package (D suffix).
GND
10
11
CP
Ordering Information
PART NUMBER
HCTS273DMSR
HCTS273KMSR
HCTS273D/Sample
HCTS273K/Sample
HCTS273HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com | Copyright © Intersil Corporation 1999
1
Spec Number 518642
File Number 2274.2