HCS86MS Datasheet, PDF (1/8 Pages) Intersil Corporation – Radiation Hardened Quad 2-Input Exclusive OR Gate

HCS86MS
September 1995
Radiation Hardened
Quad 2-Input Exclusive OR Gate
Features
Pinouts
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm²/mg
• Single Event Upset (SEU) Immunity < 2 x 10^-9 Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 10¹² RAD (Si)/s
• Dose Rate Upset >10¹⁰ RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55^oC to +125^oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-183S CDIP2-T14, LEAD FINISH C
TOP VIEW
A1 1
B1 2
Y1 3
A2 4
B2 5
Y2 6
GND 7
14 VCC
13 B4
12 A4
11 Y4
10 B3
9 A3
8 Y3
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-183S CDFP3-F14, LEAD FINISH C
TOP VIEW
Description
A1
1
14
VCC
B1
2
13
B4
The Intersil HCS86MS is a Radiation Hardened Quad 2-Input
Y1
3
12
A4
Exclusive OR Gate. A high on any one input exclusively will
A2
4
11
Y4
change the output to a High state.
B2
5
10
B3
The HCS86MS utilizes advanced CMOS/SOS technology to
Y2
6
9
A3
achieve high-speed operation. This device is a member of _GND
7
8
Y3
radiation hardened, high-speed, CMOS/SOS Logic Family with
either TTL or CMOS input compatibility.
The HCS86MS is supplied in a 14 lead Weld Seal Ceramic
flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line Package
(D suffix).
Ordering Information
PART
NUMBER
HCS86DMSR
HCS86KMSR
HCS86D/
Sample
HCS86K/
Sample
HCS86HMSR
TEMPERATURE
RANGE
-55^oC to +125^oC
-55^oC to +125^oC
+25^oC
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
PACKAGE
14 Lead SBDIP
14 Lead Ceramic
Flatpack
14 Lead SBDIP
+25^oC
+25^oC
Sample
Die
14 Lead Ceramic
Flatpack
Die
Functional Diagram
(1, 4, 9, 12)
An
Bn
(2, 5, 10, 13)
(3, 6, 8, 11)
Yn
TRUTH TABLE
INPUTS
OUTPUTS
An
Bn
Yn
L
L
L
L
H
H
H
L
H
H
H
L
NOTE: L = Logic Level Low, H = Logic level High
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
93
Spec Number 518773
File Number 3058.1