DG508A Datasheet, PDF (1/9 Pages) Maxim Integrated Products – Monolithic CMOS Analog Multiplexers

Data Sheet
September 13, 2004
DG508A
FN3137.5
[ /Title
(DG50
6A,
DG507
A,
DG508
A,
DG509
A)
/Sub-
ject
(CMO
S Ana-
log
Multi-
plex-
ers)
/Autho
r ()
/Key-
words
(Inter-
sil
Corpo-
ration,
semi-
con-
ductor,
Multi-
plexer,
Mux,
chan-
nel,
latched
,
video)
/Cre-
ator ()
CMOS Analog Multiplexers
The DG508A is a CMOS Monolithic 8-Channel Analog
Multiplexer, which can also be used as a demultiplexer. An
enable input is provided. When the enable input is high, a
channel is selected by the address inputs, and when low, all
channels are off.
A channel in the ON state conducts current equally well in
both directions. In the OFF state each channel blocks
voltages up to the supply rails. The address inputs and the
enable input are TTL and CMOS compatible over the full
specified operating temperature range.
The DG508A is pinout compatible with the industry standard
devices.
Ordering Information
TEMP.
PART NUMBER RANGE (^oC)
PACKAGE
PKG.
DWG. #
DG508AAK
-55 to 125 16 Ld CERDIP F16.3
DG508ABK
-25 to 85 16 Ld CERDIP F16.3
DG508ACJ
0 to 70 16 Ld PDIP
E16.3
DG508ACJZ
(See Note)
0 to 70
16 Ld PDIP
(Pb-free)
E16.3
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
Pinout
DG508A (PDIP, CERDIP)
TOP VIEW
A₀ 1
EN 2
V- 3
S_{1 4}
S_{2 5}
S₃ 6
S₄ 7
D8
16 A₁
15 A₂
14 GND
13 V+
12 S₅
11 S₆
10 S₇
9 S₈
Features
• Low Power Consumption
• TTL and CMOS-Compatible Address and Enable Inputs
• 44V Maximum Power Supply Rating
• High Latch-Up Immunity
• Break-Before-Make Switching
• Alternate Source
• Pb-free Available
Applications
• Data Acquisition Systems
• Communication Systems
• Signal Multiplexing/Demultiplexing
• Audio Signal Multiplexing
Truth Table
DG508A
A₂
A₁
A₀
EN
X
X
X
0
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
1
A₀, A₁, A₂, EN
Logic “1” = V_AH ≥ 2.4V, Logic “0” = V_AL ≤ 0.8V
ON SWITCH
None
1
2
3
4
5
6
7
8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001, 2004