DG300A_01 Datasheet, PDF (1/7 Pages) Intersil Corporation – TTL-Compatible, CMOS Analog Switches

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DG300A, DG301A, DG303A
May 2001
File Number 3119.3
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303
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TTL-Compatible, CMOS Analog Switches
The DG300A through DG303A family of monolithic CMOS
switches are truly compatible second source of the original
manufacturer. The switches are latch-proof and are
designed to block signals up to 30V_P-P when OFF. Featuring
low leakage and low power consumption, these switches are
ideally suited for precision application in instrumentation,
communication, data acquisition and battery powered
applications. Other key features include Break-Before-Make
switching, TTL and CMOS compatibility, and low ON
resistance. Single supply operation (for positive switch
voltages) is possible by connecting V- to 0V.
Features
• Low Power Consumption
• Break-Before-Make Switching
- t_ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns
- t_OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130ns
• TTL, CMOS Compatible
• Low r_DS(ON) (Max). . . . . . . . . . . . . . . . . . . . . . . . . . . 50Ω
• Single Supply Operation
• True Second Source
Part Number Information
PART NUMBER
DG300ABK
DG301ACJ
DG303AAK
DG303ABK
DG303ACJ
DG303ACY
TEMP.
RANGE (^oC)
PACKAGE
-25 to 85 14 Ld CERDIP
0 to 70 14 Ld PDIP
-55 to 125 14 Ld CERDIP
-25 to 85 14 Ld CERDIP
0 to 70 14 Ld PDIP
0 to 70 16 Ld SOIC
PKG.
NO.
F14.3
E14.3
F14.3
F14.3
E14.3
M16.3
Functional Diagrams and Pinouts (Switches shown for a logic “1” input)
DG300A
(SPST)
S₁
IN₁
IN₂
S₂
DG300A TRUTH TABLE
LOGIC
SWITCH
D₁
0
1
OFF
ON
Logic “0” ≤ 0.8V, Logic “1” ≥ 4.0V.
D₂
DG300A (CERDIP)
TOP VIEW
NC 1
D₁ 2
NC 3
S₁ 4
NC 5
IN₁ 6
GND 7
14 V+
13 D₂
12 NC
11 S₂
10 NC
9 IN₂
8 V-
DG301A
(SPDT)
DG301A TRUTH TABLE
LOGIC
SWITCH 1 SWITCH 2
0
OFF
ON
S₁
D₁
1
ON
OFF
Logic “0” ≤ 0.8V, Logic “1” ≥ 4.0V.
S₂
D₂
IN
DG301A (PDIP)
TOP VIEW
NC 1
D₁ 2
NC 3
S₁ 4
NC 5
IN 6
GND 7
14 V+
13 D₂
12 NC
11 S₂
10 NC
9 NC
8 V-
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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