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DG300A Datasheet, PDF (1/7 Pages) Intersil Corporation – TTL-Compatible, CMOS Analog Switches
Data Sheet
DG300A, DG301A, DG303A
June 1999 File Number 3119.2
TTL-Compatible, CMOS Analog Switches
The DG300A through DG303A family of monolithic CMOS
switches are truly compatible second source of the original
manufacturer. The switches are latch-proof and are
designed to block signals up to 30VP-P when OFF. Featuring
low leakage and low power consumption, these switches are
ideally suited for precision application in instrumentation,
communication, data acquisition and battery powered
applications. Other key features include Break-Before-Make
switching, TTL and CMOS compatibility, and low ON
resistance. Single supply operation (for positive switch
voltages) is possible by connecting V- to 0V.
Features
• Low Power Consumption
• Break-Before-Make Switching
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130ns
• TTL, CMOS Compatible
• Low rDS(ON) (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . 50Ω
• Single Supply Operation
• True Second Source
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
DG300ABK
-25 to 85 14 Ld CERDIP
DG301ACJ
0 to 70 14 Ld PDIP
DG303AAK
-55 to 125 14 Ld CERDIP
DG303ABK
-25 to 85 14 Ld CERDIP
DG303ACJ
0 to 70 14 Ld PDIP
DG303ACY
0 to 70 16 Ld SOIC
PKG.
NO.
F14.3
E14.3
F14.3
F14.3
E14.3
M16.3
Functional Diagrams and Pinouts (Switches shown for a logic “1” input)
DG300A
(SPST)
S1
IN1
IN2
S2
DG300A TRUTH TABLE
LOGIC
SWITCH
D1
0
1
OFF
ON
Logic “0” ≤ 0.8V, Logic “1” ≥ 4.0V.
D2
DG300A (CERDIP)
TOP VIEW
NC 1
D1 2
NC 3
S1 4
NC 5
IN1 6
GND 7
14 V+
13 D2
12 NC
11 S2
10 NC
9 IN2
8 V-
DG301A
(SPDT)
DG301A TRUTH TABLE
LOGIC
SWITCH 1 SWITCH 2
0
OFF
ON
S1
D1
1
ON
OFF
Logic “0” ≤ 0.8V, Logic “1” ≥ 4.0V.
S2
D2
IN
DG301A (PDIP)
TOP VIEW
NC 1
D1 2
NC 3
S1 4
NC 5
IN 6
GND 7
14 V+
13 D2
12 NC
11 S2
10 NC
9 NC
8 V-
4-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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