28F640P3 Datasheet, PDF (88/102 Pages) Intel Corporation – Intel StrataFlash Embedded Memory

1-Gbit P30 Family
Figure 43. BEFP Flowchart
BUFFERED ENHANCED FACTORY PROGRAMMING (BEFP) PROCEDURE
Setup Phase
Program & Verify Phase
Exit Phase
Start
Read
Status Reg.
Read
Status Reg.
VPP applied
Block Unlocked
Write 80h @
1^st Word Address
Write D0h @
1^st Word Address
BEFP Setup delay
Read
Status Reg.
BEFP Setup
Done?
Yes (SR[7]=0)
No (SR[7]=1)
Check VPP, Lock
errors (SR[3,1])
Exit
No (SR[0]=1)
Data Stream
Ready?
Yes (SR[0]=0)
Initialize Count:
X=0
W rite Data @ 1^st
Word Address
Increment Count:
X = X+1
N
Check
X = 32?
Y
Read
Status Reg.
No (SR[0]=1)
Program
Done?
Yes (SR[0]=0)
N
Last
Data?
Y
W rite 0xFFFF,
Address Not within
Current Block
No (SR[7]=0)
BEFP
Ex ited ?
Yes (SR[7]=1)
Full Status Check
Procedure
Program
Complete
Bus
State
BEFP Setup
Operation
Comments
W rite
W rite
(Note 1)
W rite
Unlock
Block
BEFP
Setup
BEFP
C on f ir m
VPPH applied to VPP
Data = 0x80 @ 1^st Word
Address
Data = 0x80 @ 1^st Word
Address¹
Read
Status
Register
Data = Status Register Data
Address = 1^st Word Addr.
Standby
BEFP
Setup
Done?
Check SR[7]:
0 = BEFP Ready
1 = BEFP Not Ready
Standby
Error
C o n d it io n
Check
If SR[7] is set, check:
SR[3] set = VPP Error
SR[1] set = Locked Block
Bus
State
BEFP Program & Verify
O p er at io n
Comments
Read
Status
R e g is t e r
Data = Status Register Data
Address = 1^st Word Addr.
Standby
Data Stream
Ready?
Check SR[0]:
0 = Ready for Data
1 = Not Ready for Data
Standby
Initialize
Count
X=0
W r it e
(note 2)
Load
Buffer
Data = Data to Program
Address = 1^st Word Addr.
Standby
Increm ent
Count
X = X+1
Standby
Buffer
Full?
X = 32?
Yes = Read SR[0]
No = Load Next Data Word
Read
Status
R e g is t e r
Data = Status Reg. Data
Address = 1^st Word Addr.
Standby
Program
Done?
Check SR[0]:
0 = Program Done
1 = Program in Progress
Standby
Last
Data?
No = Fill buffer again
Yes = Exit
W r it e
Exit Prog & Data = 0xFFFF @ address
Verify Phase not in current block
Bus
State
BEFP Exit
Operation
Com m ents
Read
Status
Register
Data = Status Register Data
Address = 1^st Word Addr.
Standby
Check
Exit
Status
Check SR[7]:
0 = Exit Not Completed
1 = Exit Completed
Repeat for subsequent blocks ;
After BEFP exit, a full Status Register check can
determine if any program error occurred ;
See full Status Register check procedure in the
Word Program flowchart.
Write 0xFF to enter Read Array state .
NOTES:
1. First-word address to be programmed within the target block must be aligned on a write -buffer boundary .
2. Write-buffer contents are programmed sequentially to the flash array starting at the first word address (WSM internally increments addressing ).
April 2005
88
Intel StrataFlash^® Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet