28F640L18 Datasheet, PDF (56/106 Pages) Intel Corporation – StrataFlash Wireless Memory

Intel StrataFlash® Wireless Memory (L18)
Figure 26. Data Hold Timing
CLK [C]
1 CLK
Data Hold
2 CLK
Data Hold
D[15:0] [Q]
D[15:0] [Q]
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
10.3.5
10.3.6
Table 14.
WAIT Delay
The WAIT Delay (WD) bit controls the WAIT assertion-delay behavior during synchronous burst
reads. WAIT can be asserted either during or one data cycle before invalid data is output on
DQ[15:0]. When WD is set, WAIT is asserted one data cycle before invalid data (default). When
WD is cleared, WAIT is asserted during invalid data.
Burst Sequence
The Burst Sequence (BS) bit selects linear-burst sequence (default). Only linear-burst sequence is
supported. Table 14 shows the synchronous burst sequence for all burst lengths, as well as the
effect of the Burst Wrap (BW) setting.
Burst Sequence Word Ordering (Sheet 1 of 2)
Start
Addr.
(DEC)
Burst Wrap
(RCR[3]) 4-Word Burst
(BL[2:0] = 0b001)
Burst Addressing Sequence (DEC)
8-Word Burst
(BL[2:0] = 0b010)
16-Word Burst
(BL[2:0] = 0b011)
Continuous Burst
(BL[2:0] = 0b111)
0
0
0-1-2-3
1
0
1-2-3-0
2
0
2-3-0-1
3
0
3-0-1-2
4
0
5
0
6
0
7
0
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
0-1-2-3-4…14-15
0-1-2-3-4-5-6-…
1-2-3-4-5…15-0
1-2-3-4-5-6-7-…
2-3-4-5-6…15-0-1
2-3-4-5-6-7-8-…
3-4-5-6-7…15-0-1-2
3-4-5-6-7-8-9-…
4-5-6-7-8…15-0-1-2-3
4-5-6-7-8-9-10…
5-6-7-8-9…15-0-1-2-3-4 5-6-7-8-9-10-11…
6-7-8-9-10…15-0-1-2-3-4-5 6-7-8-9-10-11-12-…
7-8-9-10…15-0-1-2-3-4-5-6 7-8-9-10-11-12-13…
14
0
15
0
14-15-0-1-2…12-13
15-0-1-2-3…13-14
14-15-16-17-18-19-20-…
15-16-17-18-19-20-21-…
0
1
0-1-2-3
1
1
1-2-3-4
2
1
2-3-4-5
3
1
3-4-5-6
4
1
5
1
6
1
7
1
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-8
2-3-4-5-6-7-8-9
3-4-5-6-7-8-9-10
4-5-6-7-8-9-10-11
5-6-7-8-9-10-11-12
6-7-8-9-10-11-12-13
7-8-9-10-11-12-13-14
0-1-2-3-4…14-15
1-2-3-4-5…15-16
2-3-4-5-6…16-17
3-4-5-6-7…17-18
4-5-6-7-8…18-19
5-6-7-8-9…19-20
6-7-8-9-10…20-21
7-8-9-10-11…21-22
0-1-2-3-4-5-6-…
1-2-3-4-5-6-7-…
2-3-4-5-6-7-8-…
3-4-5-6-7-8-9-…
4-5-6-7-8-9-10…
5-6-7-8-9-10-11…
6-7-8-9-10-11-12-…
7-8-9-10-11-12-13…
April 2005
56
Intel StrataFlash® Wireless Memory (L18)
Order Number: 251902, Revision: 009
Datasheet