D865GSA Datasheet, PDF (50/94 Pages) Intel Corporation – Technical Product Specification

Intel Desktop Board D865GSA Technical Product Specification
2.4 Interrupts
The interrupts can be routed through either the Programmable Interrupt Controller
(PIC) or the Advanced Programmable Interrupt Controller (APIC) portion of the ICH5
component. The PIC is supported in Windows 98 SE and Windows ME and uses the
first 16 interrupts. The APIC is supported in Windows 2000 and Windows XP and
supports a total of 24 interrupts.
Table 18. Interrupts
IRQ
System Resource
NMI
0
1
I/O channel check
Reserved, interval timer
Reserved, keyboard buffer full
2
Reserved, cascade interrupt from slave PIC
3
COM2 ^{(Note 1)}
4
COM1 ^{(Note 1)}
5
LPT2 (Plug and Play option)/User available
6
Diskette drive
7
LPT1 ^{(Note 1)}
8
Real-time clock
9
Reserved for ICH5 system management bus
10
User available
11
User available
12
Onboard mouse port (if present, else user available)
13
Reserved, math coprocessor
14
Primary IDE/Serial ATA (if present, else user available)
15
16 ^{(Note 2)}
17 ^{(Note 2)}
18 ^{(Note 2)}
19 ^{(Note 2)}
20 ^{(Note 2)}
21 ^{(Note 2)}
22 ^{(Note 2)}
23 ^{(Note 2)}
Secondary IDE/Serial ATA (if present, else user available)
USB UHCI controller 1 / USB UHCI controller 4 (through PIRQA)
AC ‘97 audio/modem/User available (through PIRQB)
ICH5 USB controller 3 (through PIRQC)
ICH5 USB controller 2 (through PIRQD)
ICH5 LAN (through PIRQE)
User available (through PIRQF)
User available (through PIRQG)
ICH5 USB 2.0 EHCI controller/User available (through PIRQH)
Notes:
1. Default, but can be changed to another IRQ.
2. Available in APIC mode only.
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