82575EB Datasheet, PDF (45/62 Pages) Intel Corporation – Intel® 82575EB Gigabit Ethernet Controller Datasheet

Resets — Intel^® 82575EB Gigabit Ethernet Controller
6.2 Resets
Power-on Reset (internal): The 82575EB has an internal mechanism for sensing the power pins.
Once the power is up and stable, it creates an internal reset, this reset acts as a master reset of the
entire chip. It is level sensitive, and while it is 0, will hold all of the registers in reset. Power-on Reset
is interpreted to be an indication that device power supplies are all stable. Power-on Reset changes
state during system power-up.
In-band PCIe Reset: The 82575EB will generate an internal reset in response to a physical layer
message from the PCIe or when the PCIe link halts (entry to Polling or Detect state). This reset is
equivalent to PCI reset in previous (PCI) gigabit LAN controllers.
Main_Power_Good: Used by the device to detect the D3Cold condition and activate part of the power
saving scheme.
317679-004
Revision: 2.11
January 2011
Intel^® 82575EB Gigabit Ethernet Controller
Datasheet
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