IXP42X Datasheet, PDF (3/134 Pages) Intel Corporation – Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor

Intel^® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Contents
1.0 Introduction.................................................................................................................................... 9
1.1 About this Document ............................................................................................................ 9
1.2 Product Features ................................................................................................................ 11
1.2.1 Product Line Features ........................................................................................... 11
1.2.2 Processor Features ............................................................................................... 14
2.0 Functional Overview ................................................................................................................... 15
2.1 Functional Units .................................................................................................................. 20
2.1.1 Network Processor Engines (NPEs) ...................................................................... 20
2.1.2 Internal Bus............................................................................................................ 21
2.1.2.1 North AHB ..............................................................................................21
2.1.2.2 South AHB ............................................................................................. 22
2.1.2.3 APB Bus................................................................................................. 22
2.1.3 MII Interfaces ......................................................................................................... 22
2.1.4 UTOPIA 2 .............................................................................................................. 23
2.1.5 USB Interface ........................................................................................................ 23
2.1.6 PCI Controller ........................................................................................................ 23
2.1.7 SDRAM Controller ................................................................................................. 23
2.1.8 Expansion Bus ....................................................................................................... 24
2.1.9 High-Speed, Serial Interfaces ................................................................................ 24
2.1.10 High-Speed and Console UARTs .......................................................................... 25
2.1.11 GPIO ...................................................................................................................... 25
2.1.12 Internal Bus Performance Monitoring Unit (IBPMU) .............................................. 25
2.1.13 Interrupt Controller ................................................................................................. 25
2.1.14 Timers .................................................................................................................... 26
2.1.15 AHB Queue Manager ............................................................................................ 26
2.2 Intel XScale^® Core .............................................................................................................. 26
2.2.1 Super Pipeline ....................................................................................................... 27
2.2.2 Branch Target Buffer (BTB) ................................................................................... 28
2.2.3 Instruction Memory Management Unit (IMMU) ...................................................... 29
2.2.4 Data Memory Management Unit (DMMU) ............................................................. 29
2.2.5 Instruction Cache (I-Cache) ................................................................................... 29
2.2.6 Data Cache (D-Cache) .......................................................................................... 30
2.2.7 Mini-Data Cache .................................................................................................... 30
2.2.8 Fill Buffer (FB) and Pend Buffer (PB)..................................................................... 31
2.2.9 Write Buffer (WB)................................................................................................... 31
2.2.10 Multiply-Accumulate Coprocessor (CP0) ............................................................... 31
2.2.11 Performance Monitoring Unit (PMU)...................................................................... 32
2.2.12 Debug Unit ............................................................................................................. 32
3.0 Functional Signal Descriptions.................................................................................................. 33
4.0 Package and Pinout Information................................................................................................ 50
4.1 Package Description ...........................................................................................................50
4.2 Signal-Pin Descriptions....................................................................................................... 53
4.3 Package Thermal Specifications ........................................................................................ 81
4.3.1 Commercial Temperature ...................................................................................... 81
Datasheet
Document Number: 252479, Revision: 005
March 2005
3