8XC251TA Datasheet, PDF (1/34 Pages) Intel Corporation – HIGH-PERFORMANCE CHMOS MICROCONTROLLER

ADVANCE INFORMATION
8xC251TA/TB/TP/TQ
HIGH-PERFORMANCE CHMOS MICROCONTROLLER
Commercial/Express
s Real-time and Programmed Wait State
Bus Operation
s Binary-code Compatible with MCS^® 51
s Pin Compatible with 44-pin PLCC and
40-pin PDIP MCS 51 Sockets
s Register-based MCS^® 251 Architecture
— 40-byte Register File
— Registers Accessible as Bytes,
Words, or Double Words
s Enriched MCS 51 Instruction Set
— 16-bit and 32-bit Arithmetic and
Logic Instructions
— Compare and Conditional Jump
Instructions
— Expanded Set of Move Instructions
s Linear Addressing
s 256-Kbyte Expanded External
Code/Data Memory Space
s ROM Options:
16 Kbytes (TB/TQ), 8 Kbytes (TA/TP), or
without ROM
s 16-bit Internal Code Fetch
s 64-Kbyte Extended Stack Space
s On-chip Data RAM Options:
1-Kbyte (TA/TB) or 512-Byte (TP/TQ)
s 8-bit, 2-clock External Code Fetch in
Page Mode
s Fast MCS 251 Instruction Pipeline
s User-selectable Configurations:
— External Wait States (0-3 wait
states)
— Address Range & Memory Mapping
— Page Mode
— Extended Data Float Timings or
8xC251Sx Compatible AC Timings
s 32 Programmable I/O Lines
s Eight Maskable Interrupt Sources with
Four Programmable Priority Levels
s Three Flexible 16-bit Timer/counters
s Hardware Watchdog Timer
s Programmable Counter Array
— High-speed Output
— Compare/Capture Operation
— Pulse Width Modulator
— Watchdog Timer
s Two Programmable Serial I/O Ports
— Framing Error Detection
— Automatic Address Recognition
s High-performance CHMOS Technology
s Static Standby to 24-MHz Operation
s Complete System Development
Support
— Compatible with Existing Tools
— MCS 251 Tools Available:
Compiler, Assembler, Debugger,
ICE
s Package Options (PDIP and PLCC)
© INTEL CORPORATION, 1997
November, 1997
Order Number: 273129-001