IN82C55AN Datasheet, PDF (6/21 Pages) Integral Corp. – CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

IN82C55AN
D₇ D₆ D₅ D₄ D₃ D₂ D₁ D₀
GROUP B
PORT C (LOWER)
1 = INPUT
0 = OUTPUT
PORT B
1 = INPUT
0 = OUTPUT
MODE SELECTION
0 = MODE 0
1 = MODE 1
GROUP B
PORT C (LOWER)
1 = INPUT
0 = OUTPUT
PORT B
1 = INPUT
0 = OUTPUT
MODE SELECTION
00 = MODE 0
01 = MODE 1
1X = MODE 2
MODE SET FLAG
1 = ACTIVE
Figure 6. Mode Definition Format
The mode definitions and possible mode combinations may seem confusing at first but after a cursory review
of the complete device operation a simple, logical I/O approach will surface. The design of the 82C55A has
taken into account things such as efficient PC board layout, control signal definition vs PC layout and
complete functional flexibility to support almost any peripheral device with no external logic. Such design
represents the maximum use of the available pins.
Single Bit Set/Reset Feature
Any of the eight bits of Port C can be Set or Reset using a single OUTput instruction. This feature reduces
software requirements in Control-based applications.
When Port C is being used as status/control for Port A or B, these bits can be set or reset by using the Bit
Set/Reset operation just as if they were data output ports.
D₇ D₆ D₅ D₄ D₃ D₂ D₁ D₀
DON’T
CARE
BIT SET/RESET
1 = SET
0 =RESET
BIT SELECT
01234567
0 1 0 1 0 1 0 1 B0
0 0 1 1 0 0 1 1 B1
0 0 0 0 1 1 1 1 B2
BIT SET/RESET FLAG
0 = ACTIVE
Figure 7. Bit Set/Reset Format
6